dc.creator | Morgado García de la Polavieja, Alonso | es |
dc.creator | García Sánchez, Gerardo | es |
dc.creator | Río Fernández, Rocío del | es |
dc.creator | Rosa Utrera, José Manuel de la | es |
dc.date.accessioned | 2018-09-19T10:23:13Z | |
dc.date.available | 2018-09-19T10:23:13Z | |
dc.date.issued | 2009 | |
dc.identifier.citation | Morgado García de la Polavieja, A., García Sánchez, G., Río Fernández, R.d. y Rosa Utrera, J.M.d.l. (2009). A new reconfigurable cascade ΣΔ modulator architecture with inter-stage resonation and no digital cancellation logic. En XXIV Conference on Design of Circuits and Integrated Systems, Zaragoza. | |
dc.identifier.uri | https://hdl.handle.net/11441/78640 | |
dc.description | Organizado por la Universidad de Zaragoza (Unizar) del 18 al 20 de Noviembre del 2009 | es |
dc.description.abstract | This paper presents a new two-stage cascade ΣΔ modula- tor architecture that uses inter-stage resonation to increase its effec-
tive resolution as compared to conventional cascades and avoids the need for digital filtering in the error cancellation logic. The combi- nation of these two strategies, together with the use of unity signal transfer function in all stages, make the presented modulator highly tolerant to noise leakages, very robust to non-linearities and mis- matches of the loop-filter circuitry, and especially suited for low-voltage implementations at low oversampling ratios. In addi- tion, the use of loop filters based on Forward-Euler integrators, instead of Backward-Euler integrators, simplifies the switched-capacitor implementation of the resonation and makes the presented architecture very suited for reconfigurable multi-stand- ard applications. Besides, several practical details about the imple- mentation of the modulator are given throughout the paper. As an illustration, a Beyond-3G case study is shown to demonstrate the benefits of the presented approach. | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.relation.ispartof | XXIV Conference on Design of Circuits and Integrated Systems (2009), p 1-6 | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.title | A new reconfigurable cascade ΣΔ modulator architecture with inter-stage resonation and no digital cancellation logic | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.publisherversion | http://dcis2009.unizar.es/ | es |
idus.format.extent | 6 p. | es |
dc.publication.initialPage | 1 | es |
dc.publication.endPage | 6 | es |
dc.eventtitle | XXIV Conference on Design of Circuits and Integrated Systems | es |
dc.eventinstitution | Zaragoza | es |