dc.creator | Medeiro Hidalgo, Fernando | es |
dc.creator | Pérez Verdú, Belén | es |
dc.creator | Rosa Utrera, José Manuel de la | es |
dc.creator | Rodríguez Vázquez, Ángel Benito | es |
dc.date.accessioned | 2018-07-24T08:55:42Z | |
dc.date.available | 2018-07-24T08:55:42Z | |
dc.date.issued | 1997 | |
dc.identifier.citation | Medeiro Hidalgo, F., Pérez Verdú, B., Rosa Utrera, J.M.d.l. y Rodríguez Vázquez, Á.B. (1997). Using CAD tools for shortening the design cycle of high-performance sigma–delta modulators: A 16·4 bit, 9·6 kHz, 1·71 mW ΣΔM in CMOS 0·7 μm technology. Journal Circuit Theory Applications, 25 (5), 319-334. | |
dc.identifier.issn | 0098-9886 | es |
dc.identifier.issn | 1097-007X | es |
dc.identifier.uri | https://hdl.handle.net/11441/77540 | |
dc.description.abstract | This paper uses a CAD methodology proposed by the authors to design a low-power 2nd-order Sigma-Delta Modulator (ΣΔM). This modulator has been fabricated in a 0.7μm CMOS technology to be used as the front-end of an energy-metering mixed-signal ASIC and features 16.4 bit at a digital output rate of 9.6 kHz with a power consumption of 1.7 mW. It yields a value of Power(W)/[2^resolution(bit) * Outpur rate(Hz)] which is the smallest reported to now, thus demonstrating the possibility to design high-performance embeddable ΣΔMs using CAD methodologies. | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Wiley-Blackwell | es |
dc.relation.ispartof | Journal Circuit Theory Applications, 25 (5), 319-334. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Mixed-signal circuits | es |
dc.subject | Data conversion | es |
dc.subject | ΣΔM | es |
dc.subject | Optimized design | es |
dc.subject | CAD tools | es |
dc.title | Using CAD tools for shortening the design cycle of high-performance sigma–delta modulators: A 16·4 bit, 9·6 kHz, 1·71 mW ΣΔM in CMOS 0·7 μm technology | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/submittedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.publisherversion | http://dx.doi.org/10.1002/(SICI)1097-007X(199709/10)25:5<319::AID-CTA976>3.0.CO;2-U | es |
dc.identifier.doi | 10.1002/(SICI)1097-007X(199709/10)25:5<319::AID-CTA976>3.0.CO;2-U | es |
idus.format.extent | 21 p. | es |
dc.journaltitle | Journal Circuit Theory Applications | es |
dc.publication.volumen | 25 | es |
dc.publication.issue | 5 | es |
dc.publication.initialPage | 319 | es |
dc.publication.endPage | 334 | es |