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Performance evaluation and limitations of a vision system on a reconfigurable/programmable chip

Opened Access Performance evaluation and limitations of a vision system on a reconfigurable/programmable chip

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Autor: Fernández Pérez, José María
Sánchez Fernández, Francisco J.
Carmona Galán, Ricardo
Fecha: 2007
Tipo de documento: Artículo
Resumen: This paper presents a survey of the characteristics of a vision system implemented in a reconfigurable/programmable chip (FPGA). System limitations and performance have been evaluated in order to derive specifications and constraints for further vision system synthesis. The system hereby reported has a conventional architecture. It consists in a central microprocessor (CPU) and the necessary peripheral elements for data acquisition, data storage and communications. It has been designed to stand alone, but a link to the programming and debugging tools running in a digital host (PC) is provided. In order to alleviate the computational load of the central microprocessor, we have designed a visual co-processor in charge of the low-level image processing tasks. It operates autonomously, commanded by the CPU, as another system peripheral. The complete system, without the sensor, has been implemented in a single reconfigurable chip as a SOPC. The incorporation of a dedicated visual...
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Tamaño: 364.4Kb
Formato: PDF

URI: https://hdl.handle.net/11441/71280

DOI: 10.3217/jucs-013-03-0440

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