dc.creator | Díaz del Río, Fernando | es |
dc.creator | Sevillano Ramos, José Luis | es |
dc.creator | Vicente Díaz, Saturnino | es |
dc.creator | Cagigas Muñiz, Daniel | es |
dc.creator | López-Torres, Manuel Ramón | es |
dc.date.accessioned | 2018-02-12T11:17:53Z | |
dc.date.available | 2018-02-12T11:17:53Z | |
dc.date.issued | 2009 | |
dc.identifier.citation | Díaz del Río, F., Sevillano Ramos, J.L., Vicente Díaz, S., Cagigas Muñiz, D. y López Torres, M.R. (2009). A Two-Level Dynamic Chrono-Scheduling Algorithm. En AICCSA 2009: 7th ACS/IEEE International Conference on Computer Systems and Applications (109-116), Rabat, Morocco: IEEE Computer Society. | |
dc.identifier.isbn | 978-1-4244-3807-5 | es |
dc.identifier.issn | 2161-5322 | es |
dc.identifier.uri | https://hdl.handle.net/11441/70207 | |
dc.description.abstract | We propose a dynamic instruction scheduler that does
not need any kind of wakeup logic, as all the instructions are
“programmed” on issue stage to be executed in pre-calculated
cycles. The scheduler is composed of two similar levels, each one
composed of simple “stations”, where the timing information is
recorded. The first level is aimed to the group of instructions
whose timing information cannot be calculated at issue (for
example, those instructions whose latency is not predictable).
The second level contains simple “stations” for the instructions
whose execution and write back cycle have been already
calculated. The key idea of this scheduler is to extract and
record all possible information about the future execution of an
instruction during its issue, so as not to look for this information
again and again during wait stages at the reservation stations.
Another additional advantage is that time critical parts can be
identified as instruction timing information is available, so high
speed and frequency logic can be used only in these parts, while
the rest of the scheduler can work at lower frequencies,
therefore consuming much less power. The lack of wakeup and
CAM (Content Addressable Memory) means that power
consumption and latencies would be presumably reduced,
frequency would probably be made higher, while CPI (clock
Cycles Per Instruction) would remain approximately the same. | es |
dc.description.sponsorship | Ministerio de Educación y Ciencia TIN2006-15617- C03-03 | es |
dc.description.sponsorship | Junta de Andalucía P06-TIC-02298 | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | IEEE Computer Society | es |
dc.relation.ispartof | AICCSA 2009: 7th ACS/IEEE International Conference on Computer Systems and Applications (2009), p 109-116 | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Computer architecture | es |
dc.subject | Instruction level parallelism | es |
dc.subject | Dynamic scheduling | es |
dc.subject | Reservation stations | es |
dc.subject | Reservation tables | es |
dc.subject | Superscalar processors | es |
dc.title | A Two-Level Dynamic Chrono-Scheduling Algorithm | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/submittedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores | es |
dc.relation.projectID | TIN2006-15617- C03-03 | es |
dc.relation.projectID | P06-TIC-02298 | es |
dc.relation.publisherversion | http://ieeexplore.ieee.org/document/5069312/ | es |
dc.identifier.doi | 10.1109/AICCSA.2009.5069312 | es |
dc.contributor.group | Universidad de Sevilla. TEP-108: Robótica y Tecnología de Computadores Aplicada a la Rehabilitación | es |
idus.format.extent | 8 | es |
dc.publication.initialPage | 109 | es |
dc.publication.endPage | 116 | es |
dc.eventtitle | AICCSA 2009: 7th ACS/IEEE International Conference on Computer Systems and Applications | es |
dc.eventinstitution | Rabat, Morocco | es |
dc.relation.publicationplace | New York, USA | es |
dc.contributor.funder | Ministerio de Educación y Ciencia (MEC). España | |
dc.contributor.funder | Junta de Andalucía | |