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New high performance second generation CMOS current conveyor

 

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Author: Marri, Swathi
Ramírez Angulo, Jaime
López Martín, Antonio
González Carvajal, Ramón
Department: Universidad de Sevilla. Departamento de Ingeniería Electrónica
Date: 2009
Published in: XXIV Conference on Design of Circuits and Integrated Systems: Zaragoza, 18-20 de noviembre 2009
Document type: Presentation
Abstract: A new high performance second-generation CMOS current conveyor architecture is presented. It is built using a differential flipped voltage follower as its input buffer stage and a cascode current mirror as output stage. It is characterized by very low output impedance. It provides gain independent high bandwidth when used to implement a programmable gain voltage amplifier. Simulation and experimental results in AMI 0.5µm CMOS technology are provided to validate the characteristics of the design.
Size: 302.3Kb
Format: PDF

URI: http://hdl.handle.net/11441/23445

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Attribution-NonCommercial-NoDerivatives 4.0 Internacional

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