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Mostrando ítems 1-10 de 132
Ponencia
Work-in-Progress: A Neuromorphic Approach of the Sound Source Localization Task in Real-Time Embedded Systems
(ACM Digital Library, 2019)
Autonomous robots have become a very popular topic within the artificial intelligence field. These systems are able to perform difficult or risky tasks that could be dangerous when done by humans or trained animals. ...
Ponencia
SVITE: A Spike-Based VITE Neuro-Inspired Robot Controller
(Springer, 2013)
This paper presents an implementation of a neuro-inspired algorithm called VITE (Vector Integration To End Point) in FPGA in the spikes domain. VITE aims to generate a non-planned trajectory for reaching tasks in ...
Ponencia
Building Blocks for Spikes Signals Processing
(IEEE Computer Society, 2010)
Neuromorphic engineers study models and implementations of systems that mimic neurons behavior in the brain. Neuro-inspired systems commonly use spikes to represent information. This representation has several advantages: ...
Ponencia
On the AER Convolution Processors for FPGA
(IEEE Computer Society, 2010)
Image convolution operations in digital computer systems are usually very expensive operations in terms of resource consumption (processor resources and processing time) for an efficient Real-Time application. In these ...
Ponencia
An AER handshake-less modular infrastructure PCB with x8 2.5Gbps LVDS serial links
(IEEE Computer Society, 2014)
Nowadays spike-based brain processing emulation is taking off. Several EU and others worldwide projects are demonstrating this, like SpiNNaker, BrainScaleS, FACETS, or NeuroGrid. The larger the brain process emulation ...
Ponencia
AER tools for Communications and Debugging
(IEEE Computer Society, 2006)
Address-event-representation (AER) is a communications protocol for transferring spikes between bio-inspired chips. Such systems may consist of a hierarchical structure with several chips that transmit spikes among them ...
Ponencia
AER image filtering
(SPIE Digital LIbrary, 2007-05)
Address Event Representation (AER) is an emergent neuromorphic interchip communication protocol that allows realtime virtual massive connectivity among huge number of neurons located on different chips [1]. By exploiting ...
Ponencia
FPGA Implementations Comparison of Neuro-cortical Inspired Convolution Processors for Spiking Systems
(Springer, 2009)
Image convolution operations in digital computer systems are usually very expensive operations in terms of resource consumption (processor resources and processing time) for an efficient Real-Time application. In ...
Ponencia
Live Demonstration: Multiplexing AER Asynchronous Channels over LVDS Links with Flow-Control and Clock- Correction for Scalable Neuromorphic Systems
(IEEE Computer Society, 2017)
In this live demonstration we exploit the use of a serial link for fast asynchronous communication in massively parallel processing platforms connected to a DVS for realtime implementation of bio-inspired vision processing ...
Ponencia
Live Demonstration: Neuromorphic Row-by-Row Multi-convolution FPGA Processor-SpiNNaker architecture for Dynamic-Vision Feature Extraction
(IEEE Computer Society, 2019)
In this demonstration a spiking neural network architecture for vision recognition using an FPGA spiking convolution processor, based on leaky integrate and fire neurons (LIF) and a SpiNNaker board is presented. The ...