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Mostrando ítems 11-20 de 41
Ponencia
Control neuromórfico del brazo robótico BIOROB del Citec de la Universidad de Bielefeld
(3 ciencias. Área de Innovación y Desarrollo,S.L, 2019)
Los sistemas neuronales biológicos responden a estímulos de una forma rápida y eficiente en el movimiento motor del cuerpo, comparado con los sistemas robóticos clásicos, los cuales requieren una capacidad de computación ...
Artículo
Mapping Outputs and States Encoding Bits to Outputs Using Multiplexers in Finite State Machine Implementations
(MDPI, 2023-01-18)
This paper proposes a new technique for implementing Finite State Machines (FSMs) in Field Programmable Gate Arrays (FPGAs). The proposed approach extends the called column compaction in two ways. First, it is applied to ...
Artículo
A Binaural Neuromorphic Auditory Sensor for FPGA: A Spike Signal Processing Approach
(IEEE Computer Society, 2017)
This paper presents a new architecture, design flow, and field-programmable gate array (FPGA) implementation analysis of a neuromorphic binaural auditory sensor, designed completely in the spike domain. Unlike digital ...
Ponencia
Comprehensive Evaluation of OpenCL-Based CNN Implementations for FPGAs
(Springer, 2017)
Deep learning has significantly advanced the state of the art in artificial intelligence, gaining wide popularity from both industry and academia. Special interest is around Convolutional Neural Networks (CNN), which ...
Artículo
Interfacing PDM MEMS Microphones with PFM Spiking Systems: Application for Neuromorphic Auditory Sensors
(Springer, 2022)
Neuromorphic computation processes sensors output in the spiking domain, which presents constraints in many cases when converting information to spikes, loosing, as example, temporal accuracy. This paper presents a spike-based ...
Artículo
A New Approach for Implementing Finite State Machines with Input Multiplexing
(MDPI, 2023-09)
The model called Finite State Machine with Input Multiplexing (FSMIM) was proposed as a mechanism for implementing Finite State Machines (FSMs) using ROM memory. This paper presents a novel approach for achieving more ...
Ponencia
Event-based Row-by-Row Multi-convolution engine for Dynamic-Vision Feature Extraction on FPGA
(IEEE Computer Society, 2018)
Neural networks algorithms are commonly used to recognize patterns from different data sources such as audio or vision. In image recognition, Convolutional Neural Networks are one of the most effective techniques due ...
Ponencia
Spiking row-by-row FPGA Multi-kernel and Multi-layer Convolution Processor.
(IEEE Computer Society, 2019)
Spiking convolutional neural networks have become a novel approach for machine vision tasks, due to the latency to process an input stimulus from a scene, and the low power consumption of these kind of solutions. ...
Artículo
NullHop: A Flexible Convolutional Neural Network Accelerator Based on Sparse Representations of Feature Maps
(IEEE Computer Society, 2019)
Convolutional neural networks (CNNs) have become the dominant neural network architecture for solving many stateof- the-art (SOA) visual processing tasks. Even though Graphical Processing Units (GPUs) are most often ...
Artículo
EdgeDRNN: Recurrent Neural Network Accelerator for Edge Inference
(IEEE Xplore, 2020-12)
Low-latency, low-power portable recurrent neural network (RNN) accelerators offer powerful inference capabilities for real-time applications such as IoT, robotics, and human machine interaction. We propose a lightweight ...