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Listar Arquitectura y Tecnología de Computadores por autor "García Vargas, Ignacio"
Mostrando ítems 1-18 de 18
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Artículo
A New Approach for Implementing Finite State Machines with Input Multiplexing
García Vargas, Ignacio; Senhadji Navarro, Raouf (MDPI, 2023-09)The model called Finite State Machine with Input Multiplexing (FSMIM) was proposed as a mechanism for implementing Finite ...
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Artículo
Finite State Machines With Input Multiplexing: A Performance Study
García Vargas, Ignacio; Senhadji Navarro, Raouf (IEEE Computer Society, 2015)Finite state machines with input multiplexing (FSMIMs) have been proposed in previous works as a technique for ...
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Artículo
Finite Virtual State Machines
Senhadji Navarro, Raouf; García Vargas, Ignacio (Institute of Electronics, Information and Communication Engineers, 2012)This letter proposes a new model of state machine called Finite Virtual State Machine (FVSM). A memory-based architecture ...
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Ponencia
FPGA-Based Implementation of RAM with Asymmetric Port Widths for Run-Time Reconfiguration
Senhadji Navarro, Raouf; García Vargas, Ignacio; Jiménez Moreno, Gabriel; Civit Balcells, Antón (IEEE Computer Society, 2007)In this paper, we present a HDL description of a RAM with asymmetric port widths which allows read and write operations ...
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Artículo
High-Performance Architecture for Binary-Tree-Based Finite State Machines
Senhadji Navarro, Raouf; García Vargas, Ignacio (IEEE Computer Society, 2018)A binary-tree-based finite state machine (BT-FSM) is a state machine with a 1-bit input signal whose state transition graph ...
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Artículo
Mapping arbitrary logic functions onto carry chains in FPGAs
Senhadji Navarro, Raouf; García Vargas, Ignacio (MDPI, 2022)Current Field Programmable Gate Arrays (FPGAs) provide fast routing links and special logic to perform carry operations; ...
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Artículo
Mapping Outputs and States Encoding Bits to Outputs Using Multiplexers in Finite State Machine Implementations
Senhadji Navarro, Raouf; García Vargas, Ignacio (MDPI, 2023-01-18)This paper proposes a new technique for implementing Finite State Machines (FSMs) in Field Programmable Gate Arrays (FPGAs). ...
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Tesis Doctoral
Máquinas de estados finitos con multiplexión de entradas: una contribución al diseño e implementación electrónica de máquinas de estados
García Vargas, Ignacio (2016-02-01)Esta tesis doctoral supone una contribución a la implementación electrónica de máquinas de estados finitos, en particular ...
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Artículo
Methodology for Distributed-ROM-based Implementation of Finite State Machines
Senhadji Navarro, Raouf; García Vargas, Ignacio (Institute of Electrical and Electronics Engineers, 2020-11-24)This brief explores the optimization of distributed-ROM-based Finite State Machine (FSM) implementations as an alternative ...
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Artículo
Minimum maximum reconfiguration cost problem
Senhadji Navarro, Raouf; García Vargas, Ignacio (Springer, 2016)This paper discusses the problem of minimizing the reconfiguration cost of some types of reconfigurable systems. A formal ...
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Artículo
Optimization based on the minimum maximal k-partial-matching problem of finite states machines with input multiplexing
García Vargas, Ignacio; Senhadji Navarro, Raouf (Springer, 2022-06-02)Finite State Machines with Input Multiplexing (FSMIMs) were proposed in previous work as a technique for efficient mapping ...
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Ponencia
Performance Evaluation of RAM-Based Implementation of Finite State Machines in FPGAs
Senhadji Navarro, Raouf; García Vargas, Ignacio; Guisado Lizar, José Luis (IEEE Computer Society, 2012)This paper presents a study of performance of RAM-based implementations in FPGAs of Finite State Machines (FSMs). The ...
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Ponencia
Propuesta para la elaboración de prácticas de codiseño de bajo coste
Guerra Gutiérrez, P.; García Vargas, Ignacio; Senhadji Navarro, Raouf; Jiménez Moreno, Gabriel (Universidad Politécnica de Madrid, 2006)En esta comunicación se presenta una propuesta para la elaboración de prácticas de sistemas digitales basados en codiseño. ...
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Patente
Reconocedor reconfigurable de patrones de bits basado en jerarquía de memoria
Senhadji Navarro, Raouf; García Vargas, Ignacio (Oficina Española de Patentes y Marcas , 2016-05-06)Reconocedor reconfigurable de patrones de bits basado en jerarquía de memoria que comprende una pluralidad de circuitos ...
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Ponencia
ROM-Based Finite State Machine Implementation in Low Cost FPGAs
García Vargas, Ignacio; Senhadji Navarro, Raouf; Jiménez Moreno, Gabriel; Civit Balcells, Antón; Guerra Gutiérrez, P. (IEE, 2007-06)This work presents a technique for the resource optimization of input multiplexed ROM-based Finite State Machines. This ...
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Artículo
ROM-based FSM implementation using input multiplexing in FPGA devices
Senhadji Navarro, Raouf; García Vargas, Ignacio; Jiménez Moreno, Gabriel; Civit Balcells, Antón (IET Digital Library, 2004-09)A new approach for ROM implementation of finite state machines (FSMs) is proposed, based on the selection of a subset of ...
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Ponencia
Synthetic generation of address-events for real-time image processing
Linares Barranco, Alejandro; Senhadji Navarro, Raouf; García Vargas, Ignacio; Gómez Rodríguez, Francisco de Asís; Jiménez Moreno, Gabriel; Civit Balcells, Antón (IEEE Computer Society, 2003)Address-event-representation (AER) is a communication protocol that emulates the nervous system's neurons communication, ...
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Artículo
The minimum maximal k-partial-matching problem
García Vargas, Ignacio; Senhadji Navarro, Raouf (Springer, 2013)In this paper, we introduce a new problem related to bipartite graphs called minimum maximal k-partial-matching (MMKPM) ...