Data

NameGarcía Vargas, Ignacio
DepartmentArquitectura y Tecnología de Computadores
Knowledge areaArquitectura y Tecnología de Computadores
Professional categoryProfesor Contratado Doctor
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  Statistics

  • Items

    15

  • Visits

    1156

  • Downloads

    1868

  Publications

 

Article
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Mapping arbitrary logic functions onto carry chains in FPGAs

Senhadji Navarro, Raouf; García Vargas, Ignacio (MDPI, 2022-01-01)
Current Field Programmable Gate Arrays (FPGAs) provide fast routing links and special logic to perform carry operations; ...
Article
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Methodology for Distributed-ROM-based Implementation of Finite State Machines

Senhadji Navarro, Raouf; García Vargas, Ignacio (Institute of Electrical and Electronics Engineers, 2020-11-24)
This brief explores the optimization of distributed-ROM-based Finite State Machine (FSM) implementations as an alternative ...
Article
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High-Performance Architecture for Binary-Tree-Based Finite State Machines

Senhadji Navarro, Raouf; García Vargas, Ignacio (IEEE Computer Society, 2018-01-01)
A binary-tree-based finite state machine (BT-FSM) is a state machine with a 1-bit input signal whose state transition graph ...
PhD Thesis
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Máquinas de estados finitos con multiplexión de entradas: una contribución al diseño e implementación electrónica de máquinas de estados

Senhadji Navarro, Raouf; García Vargas, Ignacio (2016-02-01)
Esta tesis doctoral supone una contribución a la implementación electrónica de máquinas de estados finitos, en particular ...
Article
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Minimum maximum reconfiguration cost problem

Senhadji Navarro, Raouf; García Vargas, Ignacio (Springer, 2016-01-01)
This paper discusses the problem of minimizing the reconfiguration cost of some types of reconfigurable systems. A formal ...
Article
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Finite State Machines With Input Multiplexing: A Performance Study

García Vargas, Ignacio; Senhadji Navarro, Raouf (IEEE Computer Society, 2015-01-01)
Finite state machines with input multiplexing (FSMIMs) have been proposed in previous works as a technique for efficient mapping ...
Article
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The minimum maximal k-partial-matching problem

García Vargas, Ignacio; Senhadji Navarro, Raouf (Springer, 2013-01-01)
In this paper, we introduce a new problem related to bipartite graphs called minimum maximal k-partial-matching (MMKPM) ...
Presentation
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Performance Evaluation of RAM-Based Implementation of Finite State Machines in FPGAs

Senhadji Navarro, Raouf; García Vargas, Ignacio; Guisado Lízar, José Luís (IEEE Computer Society, 2012-01-01)
This paper presents a study of performance of RAM-based implementations in FPGAs of Finite State Machines (FSMs). The ...
Article
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Finite Virtual State Machines

Senhadji Navarro, Raouf; García Vargas, Ignacio (Institute of Electronics, Information and Communication Engineers, 2012-01-01)
This letter proposes a new model of state machine called Finite Virtual State Machine (FVSM). A memory-based architecture ...
Presentation
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FPGA-Based Implementation of RAM with Asymmetric Port Widths for Run-Time Reconfiguration

Senhadji Navarro, Raouf; García Vargas, Ignacio; Jiménez Moreno, Gabriel; Civit Balcells, Antón (IEEE Computer Society, 2007-01-01)
In this paper, we present a HDL description of a RAM with asymmetric port widths which allows read and write operations ...
Presentation
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Propuesta para la elaboración de prácticas de codiseño de bajo coste

Guerra Gutiérrez, P.; García Vargas, Ignacio; Senhadji Navarro, Raouf; Jiménez Moreno, Gabriel (Universidad Politécnica de Madrid, 2006-01-01)
En esta comunicación se presenta una propuesta para la elaboración de prácticas de sistemas digitales basados en codiseño. ...
Presentation
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Synthetic generation of address-events for real-time image processing

Linares Barranco, Alejandro; Senhadji Navarro, Raouf; García Vargas, Ignacio; Gómez Rodríguez, Francisco de Asís; Jiménez Moreno, Gabriel; Civit Balcells, Antón (IEEE Computer Society, 2003-01-01)
Address-event-representation (AER) is a communication protocol that emulates the nervous system's neurons communication, ...
Article
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SIRENA: A CAD environment for behavioural modelling and simulation of VLSI cellular neural network chips

Carmona Galán, Ricardo; García Vargas, Ignacio; Liñán Cembrano, Gustavo; Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito (Wiley-Blackwell, 1999-01-01)
This paper presents SIRENA, a CAD environment for the simulation and modelling of mixed-signal VLSI parallel processing ...
Presentation
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An algorithm for numerical reference generation in symbolic analysis of large analog circuits

García Vargas, Ignacio; Galán, Mariano; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1997-01-01)
This paper addresses the problems arising in the calculation of numerical references (network function coefficients), ...
Presentation
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SIRENA: A simulation environment for CNNs

Domínguez Castro, Rafael; Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; García Vargas, Ignacio; Ramos, Juan F.; Carmona Galán, Ricardo (Institute of Electrical and Electronics Engineers, 1994-01-01)
SIRENA is a general simulation environment for artificial neural networks, with emphasis towards CNNs. A special interest ...