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Mostrando ítems 1-10 de 10
Ponencia
3D multi-layer vision architecture for surveillance and reconnaissance applications
(Institute of Electrical and Electronics Engineers, 2009)
The architecture and the design details of a multilayer combined mixed-signal and digital sensor-processor array chip is shown. The processor layers are fabricated with 3D integration technology, and the sensor layer is ...
Ponencia
Pixel design and evaluation in CMOS image sensor technology
(2009)
A chip designed in a 0.18 μm CMOS Image Sensor Technology (CIS) is presented which incorporates different pixel design alternatives for Active Pixel Sensor (APS). CIS technology improves characteristics such as sensitivity, ...
Ponencia
Low power LVDS transceiver for AER links with burst mode operation capability
(2009)
This paper presents the design and simulation of an LVDS transceiver intended to be used in serial AER links. Traditional implementations of LVDS serial interfaces require a continuous data flow between the transmitter ...
Ponencia
Exploiting memristance for implementing spike-time-dependent-plasticity in neuromorphic nanotechnology systems
(2009)
In this paper we show that STDP can be implemented using a crossbar memristive array combined with neurons that asynchronously generate spikes of a given shape. An attenuated version of such spikes needs to be sent ...
Ponencia
Un algoritmo de desentrelazado adaptativo con la repetición de imágenes basado en lógica difusa
(2009)
Esta comunicación presenta un interpolator tempo- ral basado en lógica difusa que es utilizado para el desentrelazado de la señal de vídeo. El objetivo es que dicho interpolador sea capaz de aprovechar una caracterísctica ...
Ponencia
A low-power reconfigurable ADC for biomedical sensor interfaces
(Institute of Electrical and Electronics Engineers, 2009)
This paper presents a 12-bit low-voltage low-power reconfigurable Analog-to-Digital Converter (ADC). The design employs Switched Capacitor (SC) techniques and implements a Successive Approximation (SA) algorithm. The ...
Ponencia
A new reconfigurable cascade ΣΔ modulator architecture with inter-stage resonation and no digital cancellation logic
(2009)
This paper presents a new two-stage cascade ΣΔ modula- tor architecture that uses inter-stage resonation to increase its effec- tive resolution as compared to conventional cascades and avoids the need for digital filtering ...
Ponencia
A spatial calibrated AER contrast retina with adjustable contrast threshold
(2009)
Address Event Representation (AER) is an emergent technology for assembling modular multi-blocks bio-inspired sensory and processing systems. Visual sensors (retinae) are among the first AER modules to be reported since ...
Ponencia
Random chopping in ΣΔ modulators
(2009)
Σ∆ modulators make a clever use of oversampling and exhibit inherent monotonicity, high linearity and large dynamic range but a restricted frequency range. As a result Σ∆ modulators are often the preferred option for ...
Ponencia
A VLSI-oriented and power-efficient approach for dynamic texture recognition applied to smoke detection
(2009)
The recognition of dynamic textures is fundamental in processing image sequences as they are very common in natural scenes. The computation of the optic flow is the most popular method to detect, segment and analyse dynamic ...