- idUS
- Investigación
- Ciencias
- Instituto de Microelectrónica de Sevilla (IMSE-CNM)
- Ponencias (Instituto de Microelectrónica de Sevilla (IMSE-CNM))
- Listar Ponencias (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por autor
Listar Ponencias (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por autor "Linares Barranco, Bernabé"
Mostrando ítems 1-20 de 25
-
Ponencia
A basic building block approach to CMOS design of analog neuro/fuzzy systems
Vidal Verdú, Fernando; Rodríguez Vázquez, Ángel Benito; Linares Barranco, Bernabé; Sánchez Sinencio, Edgar (Institute of Electrical and Electronics Engineers, 1994)Outlines a systematic approach to design fuzzy inference systems using analog integrated circuits in standard CMOS VLSI ...
-
Ponencia
A bioinspired 128x128 pixel dynamic-vision-sensor
Serrano Gotarredona, María Teresa; Leñero Bardallo, Juan Antonio; Linares Barranco, Bernabé (2011)This paper presents a 128x128 dynamic vision sensor. Each pixel detects temporal changes in the local illumination. A ...
-
Ponencia
A CMOS Implementation of Fitzhugh-Nagumo Neuron Model
Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1990)A CMOS circuit is proposed that emulates FitzHugh-Nagumo's differential equations using OTAs, diode connected MOSFETs and ...
-
Ponencia
A Model for VLSI implementation of CNN image processing chips using current-mode techniques
Espejo Meana, Servando Carlos; Rodríguez Vázquez, Ángel Benito; Domínguez Castro, Rafael; Linares Barranco, Bernabé; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1993)A new Cellular Neural Network model is proposed which allows simpler and faster VLSI implementation than previous models. ...
-
Ponencia
A novel CMOS analog neural oscillator cell
Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Newcomb, Robert W.; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1989)A very flexible programmable CMOS analog neural oscillator cell architecture is presented. The proposed neuron circuit ...
-
Ponencia
A spatial calibrated AER contrast retina with adjustable contrast threshold
Leñero Bardallo, Juan Antonio; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (2009)Address Event Representation (AER) is an emergent technology for assembling modular multi-blocks bio-inspired sensory and ...
-
Ponencia
AER Building Blocks for Multi-Layer Multi-Chip Neuromorphic Vision Systems
Serrano Gotarredona, Rafael; Oster, M.; Lichtsteiner, P.; Linares Barranco, Alejandro; Paz Vicente, Rafael; Gómez Rodríguez, Francisco de Asís; Kolle Riis, H.; Delbrück, Tobi; Liu, Shih-Chii; Zahnd, S.; Whatley, A.M.; Douglas, R.; Häfliger, P.; Jiménez Moreno, Gabriel; Civit Balcells, Antón; Serrano Gotarredona, María Teresa; Acosta Jiménez, Antonio José; Linares Barranco, Bernabé (Neural Information Processing Systems Foundation, 2005)A 5-layer neuromorphic vision processor whose components communicate spike events asychronously using the ...
-
Ponencia
Analog neural networks for real-time constrained optimization
Domínguez Castro, Rafael; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Sánchez Sinencio, Edgar; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 1990)Architectures and circuit techniques for implementing general piecewise constrained optimization problems using VLSI ...
-
Ponencia
CMOS analog neural network systems based on oscillatory neurons
Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1992)This paper addresses the design of two neural network systems based on the use of pulsing neurons. Each neuron is built ...
-
Ponencia
CMOS circuit implementations for neuron models
Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1990)The mathematical neuron basic cells used as basic cells in popular neural network architectures and algorithms are discussed. ...
-
Ponencia
Event-driven sensing and processing for high-speed robotic vision
Camuñas Mesa, Luis Alejandro; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 2014)We present here an overview of a new vision paradigm where sensors and processors use visual information ...
-
Ponencia
Exploiting memristance for implementing spike-time-dependent-plasticity in neuromorphic nanotechnology systems
Linares Barranco, Bernabé; Serrano Gotarredona, María Teresa (2009)In this paper we show that STDP can be implemented using a crossbar memristive array combined with neurons that asynchronously ...
-
Ponencia
Frequency tuning loop for VCOs
Linares Barranco, Bernabé; Rodríguez Vázquez, Ángel Benito; Sánchez Sinencio, Edgar; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1991)A frequency tuning circuit is introduced for VCOs (voltage-controlled oscillators) so that the final relationship between ...
-
Ponencia
Generation and design of sinusoidal oscillators using OTAS
Linares Barranco, Bernabé; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Sánchez Sinencio, Edgar; Hoyle, Javier J. (Institute of Electrical and Electronics Engineers, 1988)The design of voltage-controlled oscillators (VCOs) using operational transconductance amplifiers (OTAs) is discussed. ...
-
Ponencia
Hysteresis based neural oscillators for VLSI implementations
Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1991)The actual tendency in most of the work that is being done in VLSI neural network research is to use the simplest possible ...
-
Ponencia
Live Demonstration: Event-Driven Sensing and Processing for High-Speed Robotic Vision
Camuñas Mesa, Luis Alejandro; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 2014) -
Ponencia
Low power LVDS transceiver for AER links with burst mode operation capability
Zamarreño Ramos, Carlos; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (2009)This paper presents the design and simulation of an LVDS transceiver intended to be used in serial AER links. Traditional ...
-
Ponencia
Modular analog continuous-time VLSI neural networks with on chip hebbian learning and analog storage
Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1992)A modular analog circuit design approach for hardware implementations of neural networks is presented. This approach is ...
-
Ponencia
Nonlinear time-domain macromodeling of OTA circuits
Pérez Verdú, Belén; Cruz Moreno, J.; Linares Barranco, Bernabé; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis; Sánchez Sinencio, Edgar (Institute of Electrical and Electronics Engineers, 1989)The authors present an accurate nonlinear macromodel of the operational transconductance amplifier (OTA) which is suitable ...
-
Ponencia
OTA-based non-linear function approximations
Sánchez Sinencio, Edgar; Ramírez Angulo, Jaime; Linares Barranco, Bernabé; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1989)The suitability of operational transconductance amplifiers (OTAs) as the main active element to obtain basic building ...