Listar Ponencias (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por autor "Espejo Meana, Servando Carlos"
Mostrando ítems 1-20 de 39
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Ponencia
A 0.5 /spl mu/m CMOS CNN analog random access memory chip for massive image processing
(Institute of Electrical and Electronics Engineers, 1998)An analog RAM has been designed to act as a cache memory for a CNN Universal Machine. Hence, all the non-standard chips ...
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Ponencia
A countinuous-time cellular neural network chip for direction-selectable connected component detection with optical image acquisition
(Institute of Electrical and Electronics Engineers, 1994)This paper presents a continuous-time Cellular Neural Network (CNN) chip [1] for the application of Connected Component ...
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Ponencia
A mixed-signal early vision chip with embedded image and programming memories and digital I/O
(The International Society for Optical Engineering - SPIE, 2003)From a system level perspective, this paper presents a 128 × 128 flexible and reconfigurable Focal-Plane Analog Programmable ...
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Ponencia
A Model for VLSI implementation of CNN image processing chips using current-mode techniques
(Institute of Electrical and Electronics Engineers, 1993)A new Cellular Neural Network model is proposed which allows simpler and faster VLSI implementation than previous models. ...
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Ponencia
A multimode gray-scale CMOS optical sensor for visual computers
(Institute of Electrical and Electronics Engineers, 2002)This paper presents a new multimode optical sensor architecture for the optical interface of Visual CNN (cellular neural ...
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Ponencia
A one-transistor-synapse strategy for electrically-programmable massively-parallel analog array processors
(Institute of Electrical and Electronics Engineers, 1997)This paper presents a linear, four-quadrants, electrically-programmable, one-transistor synapse strategy applicable to the ...
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Ponencia
A processing element architecture for high-density focal plane analog programmable array processors
(Institute of Electrical and Electronics Engineers, 2002)The architecture of the elementary Processing Element - PE- used in a recently designed 128×128 Focal Plane Analog ...
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Ponencia
A versatile sensor interface for programmable vision systems-on-chip
(The International Society for Optical Engineering - SPIE, 2003)This paper describes an optical sensor interface designed for a programmable mixed-signal vision chip. This chip has been ...
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Ponencia
ACE 16k based stand-alone system for real-time pre-processing tasks
(The International Society for Optical Engineering - SPIE, 2005)This paper describes the design of a programmable stand-alone system for real time vision pre-processing tasks. The system's ...
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Ponencia
ACE16K: A 128×128 focal plane analog processor with digital I/O
(Institute of Electrical and Electronics Engineers, 2002)This paper presents a new generation 128×128 focal-plane analog programmable array processor (FPAPAP), from a system level ...
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Ponencia
ACE16k: A programmable focal plane vision processor with 128 x 128 resolution
(European Conference on Circuit Theory and Design, 2001)This paper presents a new generation 128x128 Focal Plane Analog Programmable Array Processor (FPAPAP), from a system ...
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Ponencia
Analog weight buffering strategy for CNN chips
(Institute of Electrical and Electronics Engineers, 2003)Large, gray-scale CNN chips employ analog signals to achieve high-density in the internal distribution of the template ...
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Ponencia
Application of piecewise-linear switched-capacitor circuits for random number generation
(Institute of Electrical and Electronics Engineers, 1989)An unconventional application of switched-capacitor (SC) circuits is discussed. A systematic method for the design of ...
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Ponencia
Bio-inspired analog parallel array processor chip with programmable spatio-temporal dynamics
(Institute of Electrical and Electronics Engineers, 2002)A bio-inspired model for an analog parallel array processor (APAP), based on studies on the vertebrate retina, permits the ...
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Ponencia
Challenges in mixed-signal IC design of CNN chips in submicron CMOS
(Institute of Electrical and Electronics Engineers, 1998)Summary form only given. The contrast observed between the performance of artificial vision machines and "natural" vision ...
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Ponencia
CMOS realization of a 2-layer CNN universal machine chip
(Institute of Electrical and Electronics Engineers, 2002)Some of the features of the biological retina can be modelled by a cellular neural network (CNN) composed of two dynamically ...
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Ponencia
CNN technology in action
(Institute of Electrical and Electronics Engineers, 2000)Two Cellular Neural Net Universal Machine (CNN-UM) prototypes are demonstrated in action. The first one is the latest 4096 ...
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Ponencia
CNN universal chip in CMOS technology
(Institute of Electrical and Electronics Engineers, 1994)This paper describes the design of a CNN universal chip in a standard CMOS technology. The core of the chip consists of ...
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Ponencia
Convergence and stability of the FSR CNN model
(Institute of Electrical and Electronics Engineers, 1994)Stability and convergency results are reported for a modified continuous-time CNN model. The signal range of the state ...
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Ponencia
Design of a programmable mixed-signal CMOS image-processing chip in 0.8 /spl mu/m CMOS
(Institute of Electrical and Electronics Engineers, 1997)An operational vision-chip prototype with a wide-range of potential applications in artificial-vision systems is presented. ...