Listar Ponencias (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por título
Mostrando ítems 283-302 de 307
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Ponencia
SIRENA: A simulation environment for CNNs
(Institute of Electrical and Electronics Engineers, 1994)SIRENA is a general simulation environment for artificial neural networks, with emphasis towards CNNs. A special interest ...
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Ponencia
Síntesis de sistemas de control difusos mediante herramientas de diseño de DSP sobre FPGAs
(2008)En esta comunicación se describe una nueva técnica de implementación de sistemas difusos, basada en el uso de una librería ...
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Ponencia
Some design trade-offs for large CNN chips using small-size transistors
(Institute of Electrical and Electronics Engineers, 1997)Small-size MOS transistors (MOST) exhibit a bunch of second-order effects which limit their application to design Cellular ...
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Ponencia
Structure reconfigurability of the CNNUC3 for robust template operation
(Institute of Electrical and Electronics Engineers, 2000)We demonstrate the importance of the reconfigurability of a 64/spl times/64 cells size CNN-UM chip. As we show, in such a ...
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Ponencia
Study of Non-Linear S/H Operation in Switched-Current Circuits Using Volterra Series - Application to BandPass Sigma-Delta Modulators
(2001)This paper analyses the transient behaviour of SwItched-current (SI) memory cells placed at the front-end of high-speed ...
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Ponencia
Switched-capacitor networks for scale-space generation
(Institute of Electrical and Electronics Engineers, 2011)In scale-space filtering signals are represented at several scales, each conveying different details of the original signal. ...
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Ponencia
Switched-current techniques for image processing Cellular Neural Networks in MOS VLSI
(Institute of Electrical and Electronics Engineers, 1992)An architecture and related building blocks are presented for the realization of image processing tasks using current-mode ...
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Ponencia
Symbolic analysis of large analog integrated circuits by approximation during expression generation
(Institute of Electrical and Electronics Engineers, 1994)A novel algorithm is presented that generates approximate symbolic expressions for small-signal characteristics of large ...
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Ponencia
Symbolic analysis tools-the state of the art
(Institute of Electrical and Electronics Engineers, 1996)This paper reviews the main last generation symbolic analyzers, comparing them in terms of functionality, pointing out also their shortcomings. The state of the art in this field is also studied, pointing out directions for future research.
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Ponencia
System-level optimization of baseband filters for communication applications
(The International Society for Optical Engineering - SPIE, 2003)In this paper, a design approach for the high-level synthesis of programmable continuous-time baseband filters able to ...
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Ponencia
Tactile on-chip pre-processing with techniques from artificial retinas
(The International Society for Optical Engineering - SPIE, 2005)The interest in tactile sensors is increasing as their use in complex unstructured environments is demanded, like in ...
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Ponencia
Tactile retina for slip detection
(Institute of Electrical and Electronics Engineers, 2006)The interest in tactile sensors is increasing as their use in complex unstructured environments is demanded, like in ...
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Ponencia
The CNNUC3: an analog I/O 64x64 CNN universal machine chip prototype with 7-bit analog accuracy
(Institute of Electrical and Electronics Engineers, 2000)This paper describes a full-custom mixed-signal chip which embeds distributed optical signal acquisition, digitally-programmable ...
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Ponencia
ToF Estimation Based on Compressed Real-Time Histogram Builder for SPAD Image Sensors
(Institute of Electrical and Electronics Engineers, 2019)This paper presents a FPGA implementation of a novel depth map estimation algorithm for direct time-of-flight CMOS image ...
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Ponencia
Tool for fast mismatch analysis of analog circuits
(Institute of Electrical and Electronics Engineers, 1995)A tool is presented that evaluates statistical deviations in performance characteristics of analog circuits, starting from ...
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Ponencia
Top-Down Design of a xDSL 14-bit 4MSh ZA Modulator in Digital CMOS Technology
(Institute of Electrical and Electronics Engineers, 2001)This paper describes the design of a Sigma-Delta modulator aimed for A/D conversion in xDSL applications, featuring ...
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Ponencia
Towards a computational approach for collision avoidance with real-world scenes
(SPIE- The International Society for Optical Engineering, 2003)In the central nervous systems of animals like pigeons and locusts, neurons were identified which signal objects approaching ...
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Ponencia
Transformer based front-end for a low power 2.4 GHz transceiver
(Institute of Electrical and Electronics Engineers, 2010)A low power transceiver architecture for the 2.4 GHz ISM band using a 1.0 V supply is presented. It employs a transformer ...
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Ponencia
Using CAD Tools for the Automatic Design of Low-Power ΣΔ Modulators
(1997)This paper illustrates the use of a CAD methodology to design a high-resolution 2nd-order ZA modulator with optimized power ...
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Ponencia
Using multi-threshold threshold gates in rtd-based logic design. A case study
(Laboratoire TIMA, 2007)The basic building blocks for Resonant Tunnelling Diode (RTD) logic circuits are Threshold Gates (TGs) instead of the ...