dc.creator | Díaz del Río, Fernando | es |
dc.creator | Molina Abril, Helena | es |
dc.creator | Real Jurado, Pedro | es |
dc.date.accessioned | 2020-02-25T11:29:03Z | |
dc.date.available | 2020-02-25T11:29:03Z | |
dc.date.issued | 2019 | |
dc.identifier.citation | Díaz del Río, F., Molina Abril, H. y Real Jurado, P. (2019). Computing the Component-Labeling and the Adjacency Tree of a Binary Digital Image in Near Logarithmic-Time. En CTIC 2019 : 7th International Workshop on Computational Topology in Image Contex (82-95), Málaga, España: Springer. | |
dc.identifier.isbn | 978-3-030-10827-4 | es |
dc.identifier.issn | 0302-9743 | es |
dc.identifier.uri | https://hdl.handle.net/11441/93593 | |
dc.description.abstract | Connected component labeling (CCL) of binary images is
one of the fundamental operations in real time applications. The adjacency
tree (AdjT) of the connected components offers a region-based
representation where each node represents a region which is surrounded
by another region of the opposite color. In this paper, a fully parallel
algorithm for computing the CCL and AdjT of a binary digital image
is described and implemented, without the need of using any geometric
information. The time complexity order for an image of m × n pixels
under the assumption that a processing element exists for each pixel is
near O(log(m+ n)). Results for a multicore processor show a very good
scalability until the so-called memory bandwidth bottleneck is reached.
The inherent parallelism of our approach points to the direction that
even better results will be obtained in other less classical computing
architectures. | es |
dc.description.sponsorship | Ministerio de Economía y Competitividad MTM2016-81030-P | es |
dc.description.sponsorship | Ministerio de Economía y Competitividad TEC2012-37868-C04-02 | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Springer | es |
dc.relation.ispartof | CTIC 2019 : 7th International Workshop on Computational Topology in Image Contex (2019), p 82-95 | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Component-Labeling | es |
dc.subject | Adjacency tree | es |
dc.subject | Digital image | es |
dc.subject | Parallelism | es |
dc.title | Computing the Component-Labeling and the Adjacency Tree of a Binary Digital Image in Near Logarithmic-Time | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/submittedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Matemática Aplicada I (ETSII) | es |
dc.relation.projectID | MTM2016-81030-P | es |
dc.relation.projectID | TEC2012-37868-C04-02 | es |
dc.relation.publisherversion | https://link.springer.com/chapter/10.1007/978-3-030-10828-1_7 | es |
dc.identifier.doi | 10.1007/978-3-030-10828-1_7 | es |
idus.format.extent | 14 | es |
dc.publication.initialPage | 82 | es |
dc.publication.endPage | 95 | es |
dc.eventtitle | CTIC 2019 : 7th International Workshop on Computational Topology in Image Contex | es |
dc.eventinstitution | Málaga, España | es |
dc.relation.publicationplace | Cham, Switzerland | es |