Low Overhead Monitor Mechanism for Fault-tolerant Analysis of NoC

Abstract

Modern Networks-on-Chip (NoC) have the capability to tolerate and adapt to the faults and failures in the hardware. Monitoring and debugging is a real challenge due to the NoC system complexity and large scale size. A key requirement is an evaluation and benchmarking mechanism to quantitatively analyse a NoC system’s fault tolerant capability. A novel monitoring mechanism is proposed to evaluate the fault tolerant capability of an NoC by: (1) using a compact monitor probe to detect the events of each NoC node; (2) reusing the exist NoC infrastructure to communicate analysis data of back to a terminal PC which removes the need for additional hardware resources and maintain hardware scalability and (3) calculating throughput, the number of lost/corrupted packets and generating a heat map of NoC traffic for quantitative analysis. The paper presents results on a case study using an example fault-tolerant routing algorithm and highlights the minimal area overhead of the monitoring mechanism (~6%). Results demonstrate that the proposed online monitoring strategy is highly scalable due to the compact monitor probe and the ability to reuse the existing NoC communication infrastructure. In addition, the traffic heat map generation and throughput display demonstrates benefits in aiding NoC system prototyping and debugging.