dc.creator | Liñán Cembrano, Gustavo | es |
dc.creator | Rodríguez Vázquez, Ángel Benito | es |
dc.creator | Domínguez Castro, Rafael | es |
dc.creator | Espejo Meana, Servando Carlos | es |
dc.date.accessioned | 2020-01-28T19:10:47Z | |
dc.date.available | 2020-01-28T19:10:47Z | |
dc.date.issued | 2003 | |
dc.identifier.citation | Liñán Cembrano, G., Rodríguez Vázquez, Á.B., Domínguez Castro, R. y Espejo Meana, S.C. (2003). A mixed-signal early vision chip with embedded image and programming memories and digital I/O. En VLSI Circuits and Systems (379-388), Maspalomas, España: The International Society for Optical Engineering - SPIE. | |
dc.identifier.issn | 0277-786X | es |
dc.identifier.uri | https://hdl.handle.net/11441/92417 | |
dc.description.abstract | From a system level perspective, this paper presents a 128 × 128 flexible and reconfigurable Focal-Plane Analog Programmable Array Processor, which has been designed as a single chip in a 0.35μm standard digital 1P-5M CMOS technology. The core processing array has been designed to achieve high-speed of operation and large-enough accuracy (∼ 7bit) with low power consumption. The chip includes on-chip program memory to allow for the execution of complex, sequential and/or bifurcation flow image processing algorithms. It also includes the structures and circuits needed to guarantee its embedding into conventional digital hosting systems: external data interchange and control are completely digital. The chip contains close to four million transistors, 90% of them working in analog mode. The chip features up to 330GOPs (Giga Operations per second), and uses the power supply (180GOP/Joule) and the silicon area (3.8 GOPS/mm2) efficiently, as it is able to maintain VGA processing throughputs of 100Frames/s with about 15 basic image processing tasks on each frame. | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | The International Society for Optical Engineering - SPIE | es |
dc.relation.ispartof | VLSI Circuits and Systems (2003), p 379-388 | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.title | A mixed-signal early vision chip with embedded image and programming memories and digital I/O | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dc.type.version | info:eu-repo/semantics/publishedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.publisherversion | http://dx.doi.org/10.1117/12.499153 | es |
dc.identifier.doi | 10.1117/12.499153 | es |
idus.format.extent | 10 p. | es |
dc.publication.initialPage | 379 | es |
dc.publication.endPage | 388 | es |
dc.eventtitle | VLSI Circuits and Systems | es |
dc.eventinstitution | Maspalomas, España | es |
dc.identifier.sisius | 5568607 | es |