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dc.creatorLiñán Cembrano, Gustavoes
dc.creatorRodríguez Vázquez, Ángel Benitoes
dc.creatorDomínguez Castro, Rafaeles
dc.creatorEspejo Meana, Servando Carloses
dc.date.accessioned2020-01-28T19:10:47Z
dc.date.available2020-01-28T19:10:47Z
dc.date.issued2003
dc.identifier.citationLiñán Cembrano, G., Rodríguez Vázquez, Á.B., Domínguez Castro, R. y Espejo Meana, S.C. (2003). A mixed-signal early vision chip with embedded image and programming memories and digital I/O. En VLSI Circuits and Systems (379-388), Maspalomas, España: The International Society for Optical Engineering - SPIE.
dc.identifier.issn0277-786Xes
dc.identifier.urihttps://hdl.handle.net/11441/92417
dc.description.abstractFrom a system level perspective, this paper presents a 128 × 128 flexible and reconfigurable Focal-Plane Analog Programmable Array Processor, which has been designed as a single chip in a 0.35μm standard digital 1P-5M CMOS technology. The core processing array has been designed to achieve high-speed of operation and large-enough accuracy (∼ 7bit) with low power consumption. The chip includes on-chip program memory to allow for the execution of complex, sequential and/or bifurcation flow image processing algorithms. It also includes the structures and circuits needed to guarantee its embedding into conventional digital hosting systems: external data interchange and control are completely digital. The chip contains close to four million transistors, 90% of them working in analog mode. The chip features up to 330GOPs (Giga Operations per second), and uses the power supply (180GOP/Joule) and the silicon area (3.8 GOPS/mm2) efficiently, as it is able to maintain VGA processing throughputs of 100Frames/s with about 15 basic image processing tasks on each frame.es
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherThe International Society for Optical Engineering - SPIEes
dc.relation.ispartofVLSI Circuits and Systems (2003), p 379-388
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.titleA mixed-signal early vision chip with embedded image and programming memories and digital I/Oes
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dc.type.versioninfo:eu-repo/semantics/publishedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Electrónica y Electromagnetismoes
dc.relation.publisherversionhttp://dx.doi.org/10.1117/12.499153es
dc.identifier.doi10.1117/12.499153es
idus.format.extent10 p.es
dc.publication.initialPage379es
dc.publication.endPage388es
dc.eventtitleVLSI Circuits and Systemses
dc.eventinstitutionMaspalomas, Españaes
dc.identifier.sisius5568607es

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