Mostrar el registro sencillo del ítem

Ponencia

dc.creatorCarranza González, Luises
dc.creatorJiménez Garrido, Francisco Josées
dc.creatorLiñán Cembrano, Gustavoes
dc.creatorRoca Moreno, Elisendaes
dc.creatorEspejo Meana, Servando Carloses
dc.creatorRodríguez Vázquez, Ángel Benitoes
dc.date.accessioned2020-01-27T15:27:58Z
dc.date.available2020-01-27T15:27:58Z
dc.date.issued2005
dc.identifier.citationCarranza González, L., Jiménez Garrido, F.J., Liñán Cembrano, G., Roca Moreno, E., Espejo Meana, S.C. y Rodríguez Vázquez, Á.B. (2005). ACE 16k based stand-alone system for real-time pre-processing tasks. En VLSI Circuits and Systems II (872-879), Sevilla, España: The International Society for Optical Engineering - SPIE.
dc.identifier.issn0277-786Xes
dc.identifier.urihttps://hdl.handle.net/11441/92360
dc.description.abstractThis paper describes the design of a programmable stand-alone system for real time vision pre-processing tasks. The system's architecture has been implemented and tested using an ACE16k chip and a Xilinx xc4028xl FPGA. The ACE16k chip consists basically of an array of 128×128 identical mixed-signal processing units, locally interacting, which operate in accordance with single instruction multiple data (SIMD) computing architectures and has been designed for high speed image pre-processing tasks requiring moderate accuracy levels (7 bits). The input images are acquired using the optical input capabilities of the ACE16k chip, and after being processed according to a programmed algorithm, the images are represented at real time on a TFT screen. The system is designed to store and run different algorithms and to allow changes and improvements. Its main board includes a digital core, implemented on a Xilinx 4028 Series FPGA, which comprises a custom programmable Control Unit, a digital monochrome PAL video generator and an image memory selector. Video SRAM chips are included to store and access images processed by the ACE16k. Two daughter boards hold the program SRAM and a video DAC-mixer card is used to generate composite analog video signal.es
dc.description.sponsorshipEuropean Commission IST2001 – 38097es
dc.description.sponsorshipMinisterio de Ciencia y Tecnología TIC2003 – 09817- C02 – 01es
dc.description.sponsorshipOffice of Naval Research (USA) N000140210884es
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherThe International Society for Optical Engineering - SPIEes
dc.relation.ispartofVLSI Circuits and Systems II (2005), p 872-879
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectACE16kes
dc.subjectFull custom control unites
dc.subjectReal-timees
dc.subjectStand-alonees
dc.subjectVision pre-processinges
dc.subjectVision systemes
dc.titleACE 16k based stand-alone system for real-time pre-processing taskses
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/acceptedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Electrónica y Electromagnetismoes
dc.relation.projectIDIST2001 – 38097es
dc.relation.projectIDTIC2003 – 09817- C02 – 01es
dc.relation.projectIDN000140210884es
dc.relation.publisherversionhttp://dx.doi.org/10.1117/12.608220es
dc.identifier.doi10.1117/12.608220es
idus.format.extent8 p.es
dc.publication.initialPage872es
dc.publication.endPage879es
dc.eventtitleVLSI Circuits and Systems IIes
dc.eventinstitutionSevilla, Españaes
dc.identifier.sisius5515975es

FicherosTamañoFormatoVerDescripción
ACE16k based stand-alone system.pdf520.3KbIcon   [PDF] Ver/Abrir  

Este registro aparece en las siguientes colecciones

Mostrar el registro sencillo del ítem

Attribution-NonCommercial-NoDerivatives 4.0 Internacional
Excepto si se señala otra cosa, la licencia del ítem se describe como: Attribution-NonCommercial-NoDerivatives 4.0 Internacional