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dc.creatorJiménez Fernández, Ángel Franciscoes
dc.creatorFuentes del Bosh, J.L.es
dc.creatorPaz Vicente, Rafaeles
dc.creatorLinares Barranco, Alejandroes
dc.creatorJiménez Moreno, Gabrieles
dc.date.accessioned2019-12-27T10:27:32Z
dc.date.available2019-12-27T10:27:32Z
dc.date.issued2010
dc.identifier.citationJiménez Fernández, Á.F., Fuentes del Bosh, J.L., Paz Vicente, R., Linares Barranco, A. y Jiménez Moreno, G. (2010). Live demonstration: Neuro-inspired system for realtime vision tilt correction. En ISCAS 2010: IEEE International Symposium on Circuits and Systems (1393-1393), Paris, France: IEEE Computer Society.
dc.identifier.isbn978-1-4244-5308-5es
dc.identifier.issn0271-4302es
dc.identifier.urihttps://hdl.handle.net/11441/91265
dc.description.abstractCorrecting digital images tilt needs huge quantities of memory, high computational resources, and use to take a considerable amount of time. This demonstration shows how a spikes-based silicon retina dynamic vision sensor (DVS) tilt can corrected in real time using a commercial accelerometer. DVS output is a stream of spikes codified using the address-event representation (AER). Event-based processing is focused on change in real time DVS output addresses. Taking into account this DVS feature, we present an AER based layer able to correct in real time the DVS tilt, using a high speed algorithmic mapping layer and introducing a minimum latency in the system. A co-design platform (the AER-Robot platform), based into a Xilinx Spartan 3 FPGA and an 8051 USB microcontroller, has been used to implement the system.es
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherIEEE Computer Societyes
dc.relation.ispartofISCAS 2010: IEEE International Symposium on Circuits and Systems (2010), p 1393-1393
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.titleLive demonstration: Neuro-inspired system for realtime vision tilt correctiones
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/submittedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadoreses
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/5537268es
dc.identifier.doi10.1109/ISCAS.2010.5537268es
idus.format.extent1es
dc.publication.initialPage1393es
dc.publication.endPage1393es
dc.eventtitleISCAS 2010: IEEE International Symposium on Circuits and Systemses
dc.eventinstitutionParis, Francees
dc.relation.publicationplaceNew York, USAes

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