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dc.creatorJiménez Fernández, Ángel Franciscoes
dc.creatorLinares Barranco, Alejandroes
dc.creatorPaz Vicente, Rafaeles
dc.creatorJiménez Moreno, Gabrieles
dc.creatorCivit Balcells, Antónes
dc.date.accessioned2019-12-16T12:45:21Z
dc.date.available2019-12-16T12:45:21Z
dc.date.issued2010
dc.identifier.citationJiménez Fernández, Á.F., Linares Barranco, A., Paz Vicente, R., Jiménez Moreno, G. y Civit Balcells, A. (2010). Building Blocks for Spikes Signals Processing. En IJCNN 2010 : International Joint Conference on Neural Networks Barcelona, España: IEEE Computer Society.
dc.identifier.isbn978-1-4244-6916-1es
dc.identifier.issn2161-4393es
dc.identifier.urihttps://hdl.handle.net/11441/90975
dc.description.abstractNeuromorphic engineers study models and implementations of systems that mimic neurons behavior in the brain. Neuro-inspired systems commonly use spikes to represent information. This representation has several advantages: its robustness to noise thanks to repetition, its continuous and analog information representation using digital pulses, its capacity of pre-processing during transmission time, ... , Furthermore, spikes is an efficient way, found by nature, to codify, transmit and process information. In this paper we propose, design, and analyze neuro-inspired building blocks that can perform spike-based analog filters used in signal processing. We present a VHDL implementation for FPGA. Presented building blocks take advantages of the spike rate coded representation to perform a massively parallel processing without complex hardware units, like floating point arithmetic units, or a large memory. Those low requirements of hardware allow the integration of a high number of blocks inside a FPGA, allowing to process fully in parallel several spikes coded signals.es
dc.description.sponsorshipJunta de Andalucía P06-TIC-O1417es
dc.description.sponsorshipMinisterio de Ciencia e Innovación TEC2009-10639-C04-02es
dc.description.sponsorshipMinisterio de Ciencia e Innovación TEC2006-11730-C03-02es
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherIEEE Computer Societyes
dc.relation.ispartofIJCNN 2010 : International Joint Conference on Neural Networks (2010),
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.titleBuilding Blocks for Spikes Signals Processinges
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/submittedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadoreses
dc.relation.projectIDP06-TIC-O1417es
dc.relation.projectIDTEC2009-10639-C04-02es
dc.relation.projectIDTEC2006-11730-C03-02es
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/5596845es
dc.identifier.doi10.1109/IJCNN.2010.5596845es
idus.format.extent8es
dc.eventtitleIJCNN 2010 : International Joint Conference on Neural Networkses
dc.eventinstitutionBarcelona, Españaes
dc.relation.publicationplaceNew York, USAes

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