dc.creator | Serrano Gotarredona, Rafael | es |
dc.creator | Oster, M. | es |
dc.creator | Lichtsteiner, P. | es |
dc.creator | Linares Barranco, Alejandro | es |
dc.creator | Paz Vicente, Rafael | es |
dc.creator | Gómez Rodríguez, Francisco de Asís | es |
dc.creator | Kolle Riis, H. | es |
dc.creator | Delbrück, Tobi | es |
dc.creator | Liu, Shih-Chii | es |
dc.creator | Zahnd, S. | es |
dc.creator | Whatley, A.M. | es |
dc.creator | Douglas, R. | es |
dc.creator | Häfliger, P. | es |
dc.creator | Jiménez Moreno, Gabriel | es |
dc.creator | Civit Balcells, Antón | es |
dc.creator | Serrano Gotarredona, María Teresa | es |
dc.creator | Acosta Jiménez, Antonio José | es |
dc.creator | Linares Barranco, Bernabé | es |
dc.date.accessioned | 2019-12-12T11:41:24Z | |
dc.date.available | 2019-12-12T11:41:24Z | |
dc.date.issued | 2005 | |
dc.identifier.citation | Serrano Gotarredona, R., Oster, M., Lichtsteiner, P., Linares Barranco, A., Paz Vicente, R., Gómez Rodríguez, F.d.A.,...,Linares Barranco, B. (2005). AER Building Blocks for Multi-Layer Multi-Chip Neuromorphic Vision Systems. En NIPS 2005: Advances in Neural Information Processing Systems 18 (1217-1224), Vancouver, British Columbia, Canada: Neural Information Processing Systems Foundation. | |
dc.identifier.uri | https://hdl.handle.net/11441/90838 | |
dc.description.abstract | A 5-layer neuromorphic vision processor whose components
communicate spike events asychronously using the address-eventrepresentation
(AER) is demonstrated. The system includes a retina
chip, two convolution chips, a 2D winner-take-all chip, a delay line
chip, a learning classifier chip, and a set of PCBs for computer
interfacing and address space remappings. The components use a
mixture of analog and digital computation and will learn to classify
trajectories of a moving object. A complete experimental setup and
measurements results are shown. | es |
dc.description.sponsorship | Unión Europea IST-2001-34124 (CAVIAR) | es |
dc.description.sponsorship | Ministerio de Ciencia y Tecnología TIC-2003-08164-C03 | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Neural Information Processing Systems Foundation | es |
dc.relation.ispartof | NIPS 2005: Advances in Neural Information Processing Systems 18 (2005), p 1217-1224 | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.title | AER Building Blocks for Multi-Layer Multi-Chip Neuromorphic Vision Systems | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/publishedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores | es |
dc.contributor.affiliation | Instituto de Microelectrónica de Sevilla (IMSE-CNM) | es |
dc.relation.projectID | IST-2001-34124 (CAVIAR) | es |
dc.relation.projectID | TIC-2003-08164-C03-02 | es |
dc.relation.publisherversion | http://papers.neurips.cc/paper/2889-aer-building-blocks-for-multi-layer-multi-chip-neuromorphic-vision-systems | es |
idus.format.extent | 8 | es |
dc.publication.initialPage | 1217 | es |
dc.publication.endPage | 1224 | es |
dc.eventtitle | NIPS 2005: Advances in Neural Information Processing Systems 18 | es |
dc.eventinstitution | Vancouver, British Columbia, Canada | es |
dc.relation.publicationplace | Vancouver, Canada | es |