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dc.creatorPérez Prieto, Norbertoes
dc.creatorDelgado Restituto, Manueles
dc.creatorRodríguez Vázquez, Ángel Benitoes
dc.date.accessioned2019-11-29T15:16:12Z
dc.date.available2019-11-29T15:16:12Z
dc.date.issued2019
dc.identifier.citationPérez Prieto, N., Delgado Restituto, M. y Rodríguez Vázquez, Á.B. (2019). Artifact-Aware Analogue/Mixed-Signal Front-Ends for Neural Recording Applications. En IEEE International Symposium on Circuits and Systems (ISCAS) Sapporo, Japón: Institute of Electrical and Electronics Engineers.
dc.identifier.isbn978-1-7281-0397-6es
dc.identifier.issn2158-1525es
dc.identifier.urihttps://hdl.handle.net/11441/90646
dc.description.abstractThis paper presents a brief review of techniques to overcome the problems associated with artifacts in analog frontends for neural recording applications. These techniques are employed for handling Common-Mode (CM) Differential-Mode (DM) artifacts and include techniques such as Average Template Subtraction, Channel Blanking or Blind Adaptive Stimulation Artifact Rejection (ASAR), among others. Additionally, a new technique for DM artifacts compression is proposed. It allows to compress these artifacts to the requirements of the analog frontend and, afterwards, it allows to reconstruct the whole artifact or largely suppress it.es
dc.description.sponsorshipMinisterio de Economía y Empresa TEC2016-80923-Pes
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherInstitute of Electrical and Electronics Engineerses
dc.relation.ispartofIEEE International Symposium on Circuits and Systems (ISCAS) (2019),
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectNeural Recordinges
dc.subjectNeural prosthesises
dc.subjectBrain Machine Interfaceses
dc.subjectAnalog Front-Endes
dc.subjectArtifactses
dc.subjectArtifacts-Awarees
dc.subjectAnalog Front-Endses
dc.subjectMixed-signal Front-Endses
dc.subjectDynamic Rangees
dc.subjectASARes
dc.titleArtifact-Aware Analogue/Mixed-Signal Front-Ends for Neural Recording Applicationses
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dc.type.versioninfo:eu-repo/semantics/acceptedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Electrónica y Electromagnetismoes
dc.relation.projectIDTEC2016-80923-Pes
dc.relation.publisherversionhttps://doi.org/10.1109/ISCAS.2019.8702656es
dc.identifier.doi10.1109/ISCAS.2019.8702656es
idus.format.extent5 p.es
dc.eventtitleIEEE International Symposium on Circuits and Systems (ISCAS)es
dc.eventinstitutionSapporo, Japónes

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