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dc.creatorVidal Verdú, Fernandoes
dc.creatorRodríguez Vázquez, Ángel Benitoes
dc.creatorLinares Barranco, Bernabées
dc.creatorSánchez Sinencio, Edgares
dc.date.accessioned2019-11-13T17:30:02Z
dc.date.available2019-11-13T17:30:02Z
dc.date.issued1994
dc.identifier.citationVidal Verdú, F., Rodríguez Vázquez, Á.B., Linares Barranco, B. y Sánchez Sinencio, E. (1994). A basic building block approach to CMOS design of analog neuro/fuzzy systems. En Proceedings of 1994 IEEE 3rd International Fuzzy Systems Conference (118-123), Institute of Electrical and Electronics Engineers.
dc.identifier.isbn0-7803-1896-Xes
dc.identifier.urihttps://hdl.handle.net/11441/90191
dc.description.abstractOutlines a systematic approach to design fuzzy inference systems using analog integrated circuits in standard CMOS VLSI technologies. The proposed circuit building blocks are arranged in a layered neuro/fuzzy architecture composed of 5 layers: fuzzification, T-norm, normalization, consequent, and output. Inference is performed by using Takagi and Sugeno's (1989) IF-THEN rules, particularly where the rule's output contains only a constant term-a singleton. A simple CMOS circuit with tunable bell-like transfer characteristics is used for the fuzzification. The inputs to this circuit are voltages while the outputs are currents. Circuit blocks proposed for the remaining layers operate in the current-mode domain. Innovative circuits are proposed for the T-norm and normalization layers. The other two layers use current mirrors and KCL. All the proposed circuits emphasize simplicity at the circuit level-a prerequisite to increasing system level complexity and operation speed. A 3-input, 4-rule controller has been designed for demonstration purposes in a 1.6 /spl mu/m CMOS single-poly, double-metal technology. We include measurements from prototypes of the membership function block and detailed HSPICE simulations of the whole controller. These results operation speed in the range of 5 MFLIPS (million fuzzy logic inferences per second) with systematic errors below 1%.es
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherInstitute of Electrical and Electronics Engineerses
dc.relation.ispartofProceedings of 1994 IEEE 3rd International Fuzzy Systems Conference (1994), p 118-123
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.titleA basic building block approach to CMOS design of analog neuro/fuzzy systemses
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dc.type.versioninfo:eu-repo/semantics/acceptedVersiones
dc.rights.accessrightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Electrónica y Electromagnetismoes
dc.relation.publisherversionhttps://doi.org/10.1109/FUZZY.1994.343707es
dc.identifier.doihttps://doi.org/10.1109/FUZZY.1994.343707es
idus.format.extent6 p.es
dc.publication.initialPage118es
dc.publication.endPage123es
dc.eventtitleProceedings of 1994 IEEE 3rd International Fuzzy Systems Conferencees
dc.identifier.sisius5616676es

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