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dc.creatorRío Fernández, Rocío deles
dc.creatorLiñán Cembrano, Gustavoes
dc.creatorDomínguez Castro, Rafaeles
dc.creatorRodríguez Vázquez, Ángel Benitoes
dc.date.accessioned2019-11-08T15:23:47Z
dc.date.available2019-11-08T15:23:47Z
dc.date.issued1997
dc.identifier.citationRío Fernández, R.d., Liñán Cembrano, G., Domínguez Castro, R. y Rodríguez Vázquez, Á.B. (1997). A mismatch-insensitive high-accuracy high-speed continuous-time current comparator in low voltage CMOS. En 2nd IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design (111-116), Baveno, Italia: Institute of Electrical and Electronics Engineers.
dc.identifier.isbn0-7803-4240-2es
dc.identifier.urihttps://hdl.handle.net/11441/90086
dc.description.abstractThis paper presents a CMOS current comparator which employs nonlinear feedback to obtain high-accuracy (down to 1.5 pA) and high-speed for low input currents (8 ns@50 nA). This structure is much faster for low currents (below 10 /spl mu/A) than other previous nonlinear feedback comparators. Particularly, when compared to the fastest current comparator reported up to now, the new one operates at more that 100 times faster for a 1 nA current, with smaller area occupation and similar power consumption. In addition, the new comparator is virtually insensitive to mismatch and capable of operating with supply voltages as low as 1 V.es
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherInstitute of Electrical and Electronics Engineerses
dc.relation.ispartof2nd IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design (1997), p 111-116
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.titleA mismatch-insensitive high-accuracy high-speed continuous-time current comparator in low voltage CMOSes
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/acceptedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Electrónica y Electromagnetismoes
dc.relation.publisherversionhttps://doi.org/10.1109/AMICD.1997.637202es
dc.identifier.doi10.1109/AMICD.1997.637202es
idus.format.extent6 p.es
dc.publication.initialPage111es
dc.publication.endPage116es
dc.eventtitle2nd IEEE-CAS Region 8 Workshop on Analog and Mixed IC Designes
dc.eventinstitutionBaveno, Italiaes
dc.identifier.sisius5505710es

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