dc.creator | Castro López, Rafael | es |
dc.creator | Fernández Fernández, Francisco Vidal | es |
dc.creator | Medeiro Hidalgo, Fernando | es |
dc.creator | Rodríguez Vázquez, Ángel Benito | es |
dc.date.accessioned | 2019-11-04T14:50:36Z | |
dc.date.available | 2019-11-04T14:50:36Z | |
dc.date.issued | 2003 | |
dc.identifier.citation | Castro López, R., Fernández Fernández, F.V., Medeiro Hidalgo, F. y Rodríguez Vázquez, Á.B. (2003). Accurate VHDL-based simulation of Sigma Delta modulators. En IEEE International Symposium on Circuits and Systems (ISCAS) (IV-632-IV-635), Bangkok, Tailandia: Institute of Electrical and Electronics Engineers. | |
dc.identifier.isbn | 0-7803-7761-3 | es |
dc.identifier.uri | https://hdl.handle.net/11441/90018 | |
dc.description.abstract | The computational cost of transient simulation of /spl Sigma//spl Delta/ modulators (/spl Sigma//spl Delta/Ms) at the electrical level is prohibitively high. Behavioral simulation techniques offer a promising solution to this problem. This paper demonstrates that both hardware description languages (HDLs) and commercial HDL simulators constitute a valuable alternative to traditional special-purpose /spl Sigma//spl Delta/ behavioral simulators. In this sense, a library of HDL building blocks, modeling a complete set of circuit non-idealities which influence the performance of /spl Sigma//spl Delta/Ms, is presented. With these blocks, /spl Sigma//spl Delta/M architectures can be described in two different ways, which are analyzed in detail. Experimental results are provided through several simulations of a fourth-order 2-1-1 cascade multi-bit /spl Sigma//spl Delta/M. | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Institute of Electrical and Electronics Engineers | es |
dc.relation.ispartof | IEEE International Symposium on Circuits and Systems (ISCAS) (2003), pp. IV-632-IV-635. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.title | Accurate VHDL-based simulation of Sigma Delta modulators | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.publisherversion | https://doi.org/10.1109/ISCAS.2003.1206174 | es |
dc.identifier.doi | 10.1109/ISCAS.2003.1206174 | es |
idus.format.extent | 4 p. | es |
dc.publication.initialPage | IV-632 | es |
dc.publication.endPage | IV-635 | es |
dc.eventtitle | IEEE International Symposium on Circuits and Systems (ISCAS) | es |
dc.eventinstitution | Bangkok, Tailandia | es |
dc.identifier.sisius | 5568585 | es |