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dc.creatorCarmona Galán, Ricardoes
dc.creatorJiménez Garrido, Francisco Josées
dc.creatorDomínguez Castro, Rafaeles
dc.creatorEspejo Meana, Servando Carloses
dc.creatorRodríguez Vázquez, Ángel Benitoes
dc.date.accessioned2019-10-30T18:27:49Z
dc.date.available2019-10-30T18:27:49Z
dc.date.issued2002
dc.identifier.citationCarmona Galán, R., Jiménez Garrido, F.J., Domínguez Castro, R., Espejo Meana, S.C. y Rodríguez Vázquez, Á.B. (2002). Bio-inspired analog parallel array processor chip with programmable spatio-temporal dynamics. En IEEE International Symposium on Circuits and Systems (ISCAS) (V - 613-V - 616), Phoenix-Scottsdale, USA: Institute of Electrical and Electronics Engineers.
dc.identifier.isbn0-7803-7448-7es
dc.identifier.urihttps://hdl.handle.net/11441/89974
dc.description.abstractA bio-inspired model for an analog parallel array processor (APAP), based on studies on the vertebrate retina, permits the realization of complex spatio-temporal dynamics in VLSI. This model mimics the way in which images are processed in the natural visual pathway which renders a feasible alternative for the implementation of early vision tasks in standard technologies. A prototype chip has been designed and fabricated in 0.5 /spl mu/m CMOS. Design challenges, trade-offs and the building blocks of such a high-complexity system (0.5/spl times/10/sup 6/ transistors, most of them operating in analog mode) are presented in this paper.es
dc.description.sponsorshipComisión Interministerial de Ciencia y Tecnología TIC1999-0826es
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherInstitute of Electrical and Electronics Engineerses
dc.relation.ispartofIEEE International Symposium on Circuits and Systems (ISCAS) (2002), p V - 613-V - 616
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.titleBio-inspired analog parallel array processor chip with programmable spatio-temporal dynamicses
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/acceptedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Electrónica y Electromagnetismoes
dc.relation.projectIDTIC1999-0826es
dc.relation.publisherversionhttps://doi.org/10.1109/ISCAS.2002.1010778es
dc.identifier.doi10.1109/ISCAS.2002.1010778es
idus.format.extent4 p.es
dc.publication.initialPageV - 613es
dc.publication.endPageV - 616es
dc.eventtitleIEEE International Symposium on Circuits and Systems (ISCAS)es
dc.eventinstitutionPhoenix-Scottsdale, USAes
dc.identifier.sisius5597213es

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