dc.creator | Medeiro Hidalgo, Fernando | es |
dc.creator | Río Fernández, Rocío del | es |
dc.creator | Rosa Utrera, José Manuel de la | es |
dc.creator | Pérez Verdú, Belén | es |
dc.creator | Rodríguez Vázquez, Ángel Benito | es |
dc.date.accessioned | 2019-10-24T14:06:17Z | |
dc.date.available | 2019-10-24T14:06:17Z | |
dc.date.issued | 2003 | |
dc.identifier.citation | Medeiro Hidalgo, F., Río Fernández, R.d., Rosa Utrera, J.M.d.l., Pérez Verdú, B. y Rodríguez Vázquez, Á.B. (2003). Expandible high-order cascade ya modulator with constant, reduced systematic loss of resolution. En Proceedings of the 20th IEEE Instrumentation Technology Conference (229-231), Vail, USA: Institute of Electrical and Electronics Engineers. | |
dc.identifier.isbn | 0-7803-7705-2 | es |
dc.identifier.issn | 1091-5281 | es |
dc.identifier.uri | https://hdl.handle.net/11441/89876 | |
dc.description.abstract | An arbitrary order sigma-delta modulator cascude
architecture is presented with only I-bit loss of resolution due to
scaling issues, even with single-bit quantizulion. This loss is kept
with a high overloading point, regardless of the order. Simulations
reveol that circuit imperfections can be tolerated up to 6th order, so
that 90-dB SNDR can be obtained with x16 oversampling, without
multi-bit quantization. | es |
dc.description.sponsorship | European Commission 2001-34283/TAMES-2 | es |
dc.description.sponsorship | Ministerio de Ciencia y Tecnología TIC2001-0929/ADAVERE | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Institute of Electrical and Electronics Engineers | es |
dc.relation.ispartof | Proceedings of the 20th IEEE Instrumentation Technology Conference (2003), p 229-231 | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.title | Expandible high-order cascade ya modulator with constant, reduced systematic loss of resolution | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.projectID | 2001-34283/TAMES-2 | es |
dc.relation.projectID | TIC2001-0929/ADAVERE | es |
dc.relation.publisherversion | https://doi.org/10.1109/IMTC.2003.1208157 | es |
dc.identifier.doi | 10.1109/IMTC.2003.1208157 | es |
idus.format.extent | 3 p. | es |
dc.publication.initialPage | 229 | es |
dc.publication.endPage | 231 | es |
dc.eventtitle | Proceedings of the 20th IEEE Instrumentation Technology Conference | es |
dc.eventinstitution | Vail, USA | es |
dc.identifier.sisius | 5568637 | es |