dc.creator | Navas González, Rafael | es |
dc.creator | Rodríguez Vázquez, Ángel Benito | es |
dc.creator | Vidal Verdú, Fernando | es |
dc.date.accessioned | 2019-06-05T10:32:12Z | |
dc.date.available | 2019-06-05T10:32:12Z | |
dc.date.issued | 2003 | |
dc.identifier.citation | Navas González, R., Rodríguez Vázquez, Á.B. y Vidal Verdú, F. (2003). Neuro-fuzzy chip to handle complex tasks with analog performance. IEEE Transactions on Neural Networks, 14 (5), 1375-1392. | |
dc.identifier.issn | 1045-9227 | es |
dc.identifier.uri | https://hdl.handle.net/11441/87225 | |
dc.description.abstract | This Paper presents a mixed-signal neuro-fuzzy controller chip which, in terms of
power consumption, input-output delay and precision performs as a fully analog
implementation. However, it has much larger complexity than its purely analog
counterparts. This combination of performance and complexity is achieved through
the use of a mixed-signal architecture consisting of a programmable analog core of
reduced complexity, and a strategy, and the associated mixed-signal circuitry, to
cover the whole input space through the dynamic programming of this core [1].
Since errors and delays are proportional to the reduced number of fuzzy rules
included in the analog core, they are much smaller than in the case where the whole
rule set is implemented by analog circuitry. Also, the area and the power
consumption of the new architecture are smaller than those of its purely analog
counterparts simply because most rules are implemented through programming.
The Paper presents a set of building blocks associated to this architecture, and gives
results for an exemplary prototype. This prototype, called MFCON, has been
realized in a CMOS 0.7μm standard technology. It has two inputs, implements 64
rules and features 500ns of input to output delay with 16mW of power consumption.
Results from the chip in a control application with a DC motor are also provided. | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | es |
dc.relation.ispartof | IEEE Transactions on Neural Networks, 14 (5), 1375-1392. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Fuzzy-Control | es |
dc.subject | Fuzzy-Hardware | es |
dc.subject | Mixed-Signal | es |
dc.title | Neuro-fuzzy chip to handle complex tasks with analog performance | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.publisherversion | http://dx.doi.org/0.1109/TNN.2003.816379 | es |
dc.identifier.doi | 10.1109/TNN.2003.816379 | es |
idus.format.extent | 18 p. | es |
dc.journaltitle | IEEE Transactions on Neural Networks | es |
dc.publication.volumen | 14 | es |
dc.publication.issue | 5 | es |
dc.publication.initialPage | 1375 | es |
dc.publication.endPage | 1392 | es |