Methodology to improve the model of series inductance in CMOS integrated inductors

Gutiérrez-Frías, Enric F.; García-Lugo, Luis A.; Becerra-Alvarez, Edwin C.; Raygoza-Panduro, Juan J.; Rosa Utrera, José Manuel de la; Ortega-Rosales, Edgardo B.

doi:10.2478/jee-2018-0034

Artículo

dc.creator	Gutiérrez-Frías, Enric F.	es
dc.creator	García-Lugo, Luis A.	es
dc.creator	Becerra-Alvarez, Edwin C.	es
dc.creator	Raygoza-Panduro, Juan J.	es
dc.creator	Rosa Utrera, José Manuel de la	es
dc.creator	Ortega-Rosales, Edgardo B.	es
dc.date.accessioned	2018-10-08T12:06:40Z
dc.date.available	2018-10-08T12:06:40Z
dc.date.issued	2018
dc.identifier.citation	Gutiérrez-Frías, E.F., García-Lugo, L.A., Becerra-Alvarez, E.C., Raygoza-Panduro, J.J., Rosa Utrera, J.M.d.l. y Ortega-Rosales, E.B. (2018). Methodology to improve the model of series inductance in CMOS integrated inductors. Journal of Electrical Engineering, 69 (3), 250-254.
dc.identifier.issn	1339-309X	es
dc.identifier.uri	https://hdl.handle.net/11441/79203
dc.description.abstract	This paper presents a systematic optimization methodology to achieve an accurate estimation of series inductance of inductors implemented in standard CMOS technologies. Proposed method is based on an optimization procedure which aims to obtain adjustment factors associated to main physical inductor characteristics, allowing to estimate more accurate series inductance values that can be used in design stage. Experimental measurements of diverse square inductor geometries are shown and compared with previous approaches in order to demonstrate and validate presented approach.	es
dc.description.sponsorship	National Council of Science and Technology of México (CONACYT) TEC2013-45638-C3-3-R	es
dc.description.sponsorship	Spanish Ministry of Economy and Competitiveness TEC2013-45638-C3-3-R	es
dc.description.sponsorship	European Regional Development Fund TEC2013-45638-C3-3-R	es
dc.description.sponsorship	Consejería de Economía, Innovación, Ciencia y Empleo de la Junta de Andalucía P12-TIC-1481	es
dc.format	application/pdf	es
dc.language.iso	eng	es
dc.publisher	Slovak Technical University	es
dc.relation.ispartof	Journal of Electrical Engineering, 69 (3), 250-254.
dc.rights	Attribution-NonCommercial-NoDerivatives 4.0 Internacional	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/4.0/	*
dc.subject	Optimization	es
dc.subject	Inductance	es
dc.subject	Adjustment factors	es
dc.subject	Integrated inductors	es
dc.title	Methodology to improve the model of series inductance in CMOS integrated inductors	es
dc.type	info:eu-repo/semantics/article	es
dcterms.identifier	https://ror.org/03yxnpp24
dc.type.version	info:eu-repo/semantics/publishedVersion	es
dc.rights.accessRights	info:eu-repo/semantics/openAccess	es
dc.contributor.affiliation	Instituto de Microelectrónica de Sevilla (IMSE-CNM)	es
dc.relation.projectID	TEC2013-45638-C3-3-R	es
dc.relation.projectID	P12-TIC-1481	es
dc.relation.publisherversion	http://dx.doi.org/10.2478/jee-2018-0034	es
dc.identifier.doi	10.2478/jee-2018-0034	es
idus.format.extent	5 p.	es
dc.journaltitle	Journal of Electrical Engineering	es
dc.publication.volumen	69	es
dc.publication.issue	3	es
dc.publication.initialPage	250	es
dc.publication.endPage	254	es

Ficheros	Tamaño	Formato	Ver	Descripción
Methodology to improve the ...	214.7Kb	[PDF]	Ver/Abrir

Este registro aparece en las siguientes colecciones

Artículos (Instituto de Microelectrónica de Sevilla (IMSE-CNM))

Mostrar el registro sencillo del ítem

Excepto si se señala otra cosa, la licencia del ítem se describe como: Attribution-NonCommercial-NoDerivatives 4.0 Internacional