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dc.creatorRodríguez Vázquez, Ángel Benitoes
dc.creatorCarmona Galán, Ricardoes
dc.creatorFernández Berni, Jorgees
dc.creatorVargas Sierra, Soniaes
dc.creatorLeñero Bardallo, Juan Antonioes
dc.creatorSuárez Cambre, Manueles
dc.creatorBrea Sánchez, Víctor Manueles
dc.creatorPérez Verdú, Belénes
dc.date.accessioned2018-09-11T13:49:20Z
dc.date.available2018-09-11T13:49:20Z
dc.date.issued2014
dc.identifier.citationRodríguez Vázquez, Á.B., Carmona Galán, R., Fernández Berni, J., Vargas Sierra, S., Leñero Bardallo, J.A., Suárez Cambre, M.,...,Pérez Verdú, B. (2014). Form Factor Improvement of Smart-Pixels for Vision Sensors through 3-D Vertically- Integrated Technologies.
dc.identifier.urihttps://hdl.handle.net/11441/78418
dc.description.abstractWhile conventional CMOS active pixel sensors embed only the circuitry required for photo-detection, pixel addressing and voltage buffering, smart pixels incorporate also circuitry for data processing, data storage and control of data interchange. This additional circuitry enables data processing be realized concurrently with the acquisition of images which is instrumental to reduce the number of data needed to carry to information contained into images. This way, more efficient vision systems can be built at the cost of larger pixel pitch. Vertically-integrated 3D technologies enable to keep the advnatges of smart pixels while improving the form factor of smart pixels.es
dc.description.sponsorshipOffice of Naval Research N000141110312es
dc.description.sponsorshipMinisterio de Ciencia e Innovación IPT-2011-1625-430000es
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherInstitute of Electrical and Electronics Engineerses
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.titleForm Factor Improvement of Smart-Pixels for Vision Sensors through 3-D Vertically- Integrated Technologieses
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/acceptedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Electrónica y Electromagnetismoes
dc.relation.projectIDN000141110312es
dc.relation.projectIDIPT-2011-1625-430000es
dc.relation.publisherversionhttp://dx.doi.org/10.1109/LASCAS.2014.6820327es
dc.identifier.doi10.1109/LASCAS.2014.6820327es
idus.format.extent4 p.es
dc.publication.initialPage1es
dc.publication.endPage4es
dc.eventtitleIEEE Latin American Symposium on Circuits and Systems (LASCAS)es
dc.eventinstitutionSantiago, Chilees
dc.contributor.funderOffice of Naval Research (ONR). United States
dc.contributor.funderMinisterio de Ciencia e Innovación (MICIN). España

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