1 V CMOS subthreshold log domain PDM

Serra Graells, Francesc; Huertas Díaz, José Luis

doi:10.1023/A:1022545414777

Artículo

dc.creator	Serra Graells, Francesc	es
dc.creator	Huertas Díaz, José Luis	es
dc.date.accessioned	2018-07-12T14:29:55Z
dc.date.available	2018-07-12T14:29:55Z
dc.date.issued	2003
dc.identifier.citation	Serra Graells, F. y Huertas Díaz, J.L. (2003). 1 V CMOS subthreshold log domain PDM. Analog Integrated Circuits and Signal Processing, 34 (3), 183-187.
dc.identifier.issn	0925-1030	es
dc.identifier.uri	https://hdl.handle.net/11441/77207
dc.description.abstract	A new CMOS circuit strategy for very low-voltage Pulse-Duration Modulators (PDM) is proposed. Optimization of voltage supply scaling below the sum of threshold voltages is based on Instantaneous Log Companding processing through the MOSFET operating in weak inversion. A 1 V VLSI PDM circuit for very low-voltage audio applications such as Hearing Aids is presented, showing good agreement between simulated and experimental data.	es
dc.description.sponsorship	Comisión Interministerial de Ciencia y Tecnología TIC97-1159, TIC99-1084	es
dc.description.sponsorship	European Union 23068	es
dc.format	application/pdf	es
dc.language.iso	eng	es
dc.publisher	Springer	es
dc.relation.ispartof	Analog Integrated Circuits and Signal Processing, 34 (3), 183-187.
dc.rights	Attribution-NonCommercial-NoDerivatives 4.0 Internacional	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/4.0/	*
dc.subject	Low-Voltage	es
dc.subject	CMOS	es
dc.subject	Subthreshold	es
dc.subject	Log	es
dc.subject	PDM	es
dc.title	1 V CMOS subthreshold log domain PDM	es
dc.type	info:eu-repo/semantics/article	es
dc.type.version	info:eu-repo/semantics/submittedVersion	es
dc.rights.accessRights	info:eu-repo/semantics/openAccess	es
dc.relation.projectID	TIC97-1159	es
dc.relation.projectID	TIC99-1084	es
dc.relation.projectID	23068	es
dc.relation.publisherversion	http://dx.doi.org/10.1023/A:1022545414777	es
dc.identifier.doi	10.1023/A:1022545414777	es
idus.format.extent	17 p.	es
dc.journaltitle	Analog Integrated Circuits and Signal Processing	es
dc.publication.volumen	34	es
dc.publication.issue	3	es
dc.publication.initialPage	183	es
dc.publication.endPage	187	es
dc.contributor.funder	Comisión Interministerial de Ciencia y Tecnología (CICYT). España
dc.contributor.funder	European Union (UE)

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