An ultra-low-power voltage-mode asynchronous WTA-LTA circuit

Fernández Berni, Jorge; Carmona Galán, Ricardo; Rodríguez Vázquez, Ángel Benito

doi:10.1109/ISCAS.2013.6572218

Ponencia

dc.creator	Fernández Berni, Jorge	es
dc.creator	Carmona Galán, Ricardo	es
dc.creator	Rodríguez Vázquez, Ángel Benito	es
dc.date.accessioned	2018-06-01T08:47:32Z
dc.date.available	2018-06-01T08:47:32Z
dc.date.issued	2013
dc.identifier.citation	Fernández Berni, J., Carmona Galán, R. y Rodríguez Vázquez, Á.B. (2013). An ultra-low-power voltage-mode asynchronous WTA-LTA circuit. En IEEE International Symposium on Circuits and Systems (ISCAS) (1-4), Beijing, China: Institute of Electrical and Electronics Engineers.
dc.identifier.isbn	978-1-4673-5762-3 (electrónico)	es
dc.identifier.isbn	978-1-4673-5760-9 (impreso)	es
dc.identifier.uri	https://hdl.handle.net/11441/75548
dc.description.abstract	This paper presents an asynchronous mixed-signal WTA-LTA circuit conceived to carry out local minimummaximum indexing in massively parallel image processing arrays. The hardware is focused on energy-efficient operation. We describe a realization for the standard CMOS base process of a commercial 3-D TSV stack featuring a power consumption of only 20pW per elementary cell at 30fps. The proposed block is also capable of resolving small voltage differences without requiring any external reference. This leads to a hit percentage greater than 90% even when taking into account global process variations and mismatch conditions.	es
dc.description.sponsorship	MINECO TEC2012-38921-C02-01	es
dc.description.sponsorship	Fondo Europeo de Desarrollo Regional IPT-2011-1625- 430000 IPC-20111009	es
dc.format	application/pdf	es
dc.language.iso	eng	es
dc.publisher	Institute of Electrical and Electronics Engineers	es
dc.relation.ispartof	IEEE International Symposium on Circuits and Systems (ISCAS) (2013), p 1-4
dc.rights	Atribución-NoComercial-SinDerivadas 3.0 Estados Unidos de América	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/4.0/	*
dc.title	An ultra-low-power voltage-mode asynchronous WTA-LTA circuit	es
dc.type	info:eu-repo/semantics/conferenceObject	es
dcterms.identifier	https://ror.org/03yxnpp24
dc.type.version	info:eu-repo/semantics/acceptedVersion	es
dc.rights.accessRights	info:eu-repo/semantics/openAccess	es
dc.contributor.affiliation	Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo	es
dc.relation.projectID	TEC2012-38921-C02-01	es
dc.relation.projectID	IPT-2011-1625- 430000	es
dc.relation.projectID	IPC-20111009	es
dc.relation.publisherversion	http://dx.doi.org/10.1109/ISCAS.2013.6572218	es
dc.identifier.doi	10.1109/ISCAS.2013.6572218	es
idus.format.extent	4 p.	es
dc.publication.initialPage	1	es
dc.publication.endPage	4	es
dc.eventtitle	IEEE International Symposium on Circuits and Systems (ISCAS)	es
dc.eventinstitution	Beijing, China	es
dc.contributor.funder	Ministerio de Economía y Competitividad (MINECO). España
dc.contributor.funder	European Commission (EC). Fondo Europeo de Desarrollo Regional (FEDER)

Ficheros	Tamaño	Formato	Ver	Descripción
An Ultra-Low-Power.pdf	435.1Kb	[PDF]	Ver/Abrir

Este registro aparece en las siguientes colecciones

Ponencias (Instituto de Microelectrónica de Sevilla (IMSE-CNM))

Mostrar el registro sencillo del ítem

Excepto si se señala otra cosa, la licencia del ítem se describe como: Atribución-NoComercial-SinDerivadas 3.0 Estados Unidos de América