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dc.creatorPaz Vicente, Rafaeles
dc.creatorLinares Barranco, Alejandroes
dc.creatorCascado Caballero, Danieles
dc.creatorRodríguez Jodar, Miguel Ángeles
dc.creatorJiménez Moreno, Gabrieles
dc.creatorCivit Balcells, Antónes
dc.creatorSevillano Ramos, José Luises
dc.date.accessioned2018-05-14T08:09:27Z
dc.date.available2018-05-14T08:09:27Z
dc.date.issued2006
dc.identifier.citationPaz Vicente, R., Linares Barranco, A., Cascado Caballero, D., Rodríguez Jodar, M.Á., Jiménez Moreno, G., Civit Balcells, A. y Sevillano Ramos, J.L. (2006). PCI-AER interface for Neuro-inspired Spiking Systems. En ISCAS 2006: IEEE International Symposium on Circuits and Systems (3161-3164), Island of Kos, Greece: IEEE Computer Society.
dc.identifier.isbn0-7803-9389-9es
dc.identifier.urihttps://hdl.handle.net/11441/74552
dc.description.abstractAddress event representation (AER) is a neuromorphic interchip communication protocol that allows for real-time connectivity between huge number neurons located on different chips. By exploiting high speed digital communication circuits (nano-seconds), synaptic neural connections can be time multiplexed (mili-seconds). When building multi-chip muti-layered AER systems it is absolutely necessary to have a computer interface that allows: (a) to read AER interchip traffic; and (b) inject a sequence of events to the AER structure. This paper presents a PCI to AER interface, that dispatches a sequence of events with timing information. It is able to recovery the possible delays introduced by AER bus. It has been implemented in real time hardware using VHDL and tested in a PCI-AER board, developed by authors, that currently capable to send and receive events at a peak rate of 16 Mev/sec, and a typical rate of 10 Mev/seces
dc.description.sponsorshipEuropean Commission IST-2001-34124es
dc.description.sponsorshipMinisterio de Ciencia y Tecnología TIC-2003-08164-C03-02es
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherIEEE Computer Societyes
dc.relation.ispartofISCAS 2006: IEEE International Symposium on Circuits and Systems (2006), p 3161-3164
dc.rightsAtribución-NoComercial-SinDerivadas 3.0 Estados Unidos de América*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.titlePCI-AER interface for Neuro-inspired Spiking Systemses
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/publishedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadoreses
dc.relation.projectIDIST-2001-34124es
dc.relation.projectIDTIC-2003-08164-C03-02es
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/1693296/es
dc.identifier.doi10.1109/ISCAS.2006.1693296es
idus.format.extent4es
dc.publication.initialPage3161es
dc.publication.endPage3164es
dc.eventtitleISCAS 2006: IEEE International Symposium on Circuits and Systemses
dc.eventinstitutionIsland of Kos, Greecees
dc.relation.publicationplaceNew York, USAes
dc.contributor.funderEuropean Commission (EC)
dc.contributor.funderMinisterio de Ciencia Y Tecnología (MCYT). España

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