dc.creator | Núñez Martínez, Juan | es |
dc.creator | Quintana Toledo, José María | es |
dc.creator | Avedillo de Juan, María José | es |
dc.date.accessioned | 2017-12-04T19:14:41Z | |
dc.date.available | 2017-12-04T19:14:41Z | |
dc.date.issued | 2011 | |
dc.identifier.citation | Núñez Martínez, J., Quintana Toledo, J.M. y Avedillo de Juan, M.J. (2011). Simplified single-phase clock scheme for MOBILE networks. Electronics Letters, 47 (11), 648-650. | |
dc.identifier.issn | 0013-5194 (impreso) | es |
dc.identifier.issn | 1350-911X (electrónico) | es |
dc.identifier.uri | http://hdl.handle.net/11441/67233 | |
dc.description.abstract | MOBILE networks can be operated in a gate-level pipelined fashion allowing high through-output. If MOBILE gates are directly chained, a four-phase clock scheme is required for this. A single-phase scheme is possible adding latches to the MOBILE gates. Proposed and experimentally validated is a new single-phase interconnection scheme that simplifies the inter-stage element, which translates in power, area and clock load advantages with respect to using latches. | es |
dc.description.sponsorship | Ministerio de Ciencia e Innovación TEC2007-67245, TEC2010-18937 | es |
dc.description.sponsorship | Junta de Andalucía TIC-2961 | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Institute of Electrical and Electronics Engineers | es |
dc.relation.ispartof | Electronics Letters, 47 (11), 648-650. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.title | Simplified single-phase clock scheme for MOBILE networks | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.projectID | TEC2007-67245 | es |
dc.relation.projectID | TEC2010-18937 | es |
dc.relation.projectID | TIC-2961 | es |
dc.relation.publisherversion | http://dx.doi.org/10.1049/el.2011.0186 | es |
dc.identifier.doi | 10.1049/el.2011.0186 | es |
idus.format.extent | 9 p. | es |
dc.journaltitle | Electronics Letters | es |
dc.publication.volumen | 47 | es |
dc.publication.issue | 11 | es |
dc.publication.initialPage | 648 | es |
dc.publication.endPage | 650 | es |
dc.identifier.sisius | 20104632 | es |
dc.contributor.funder | Ministerio de Ciencia e Innovación (MICIN). España | |
dc.contributor.funder | Junta de Andalucía | |