dc.creator | Acosta Jiménez, Antonio José | es |
dc.creator | Jiménez, R. | es |
dc.creator | Juan Chico, Jorge | es |
dc.creator | Bellido Díaz, Manuel Jesús | es |
dc.creator | Valencia Barrero, Manuel | es |
dc.date.accessioned | 2017-01-18T12:13:40Z | |
dc.date.available | 2017-01-18T12:13:40Z | |
dc.date.issued | 2000 | |
dc.identifier.citation | Acosta Jiménez, A.J., Jiménez, R.,...,Valencia Barrero, M. (2000). Influence of Clocking Strategies on the Design of Low Switching-Noise Digital and Mixed-Signal VLSI Circuits. En Integrated Circuit Design. PATMOS 2000. Lecture Notes in Computer Science, vol 1918. (pp. 316-326). Berlin: Springer. | |
dc.identifier.isbn | 978-3-540-41068-3 | es |
dc.identifier.issn | 0302-9743 | es |
dc.identifier.uri | http://hdl.handle.net/11441/52422 | |
dc.description.abstract | This communication shows the influence of clocking schemes on the
digital switching noise generation. It will be shown how the choice of a suited
clocking scheme for the digital part reduces the switching noise, thus alleviating
the problematic associated to limitations of performances in mixed-signal
Analog/Digital Integrated Circuits. Simulation data of a pipelined XOR chain
using both a single-phase and a two-phase clocking schemes, as well as of two nbit
counters with different clocking styles lead, as conclusions, to recommend
multiple clock-phase and asynchronous styles for reducing switching noise. | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Springer | es |
dc.relation.ispartof | Integrated Circuit Design. PATMOS 2000. Lecture Notes in Computer Science, vol 1918. | es |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.title | Influence of Clocking Strategies on the Design of Low Switching-Noise Digital and Mixed-Signal VLSI Circuits | es |
dc.type | info:eu-repo/semantics/bookPart | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Tecnología Electrónica | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.publisherversion | http://link.springer.com/chapter/10.1007%2F3-540-45373-3_33 | es |
dc.identifier.doi | 10.1007/3-540-45373-3_33 | es |
idus.format.extent | 11 | es |
dc.publication.initialPage | 316 | es |
dc.publication.endPage | 326 | es |
dc.relation.publicationplace | Berlin | es |