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Artículo
A 0.9-V 100-mu W Feedforward Adder-Less Inverter-Based MASH Delta Sigma Modulator With 91-dB Dynamic Range and 20-kHz Bandwidth
dc.creator | Honarparvar, Mohammad | es |
dc.creator | Rosa Utrera, José Manuel de la | es |
dc.date.accessioned | 2023-12-19T10:49:03Z | |
dc.date.available | 2023-12-19T10:49:03Z | |
dc.date.issued | 2018 | |
dc.identifier.citation | Honarparvar, M. y Rosa Utrera, J.M.d.l. (2018). A 0.9-V 100-mu W Feedforward Adder-Less Inverter-Based MASH Delta Sigma Modulator With 91-dB Dynamic Range and 20-kHz Bandwidth. IEEE Transactions on Circuits and Systems I: Regular Papers, 65 (11), 8440665. https://doi.org/10.1109/TCSI.2018.2854220. | |
dc.identifier.issn | 1549-8328 | es |
dc.identifier.issn | 1558-0806 | es |
dc.identifier.uri | https://hdl.handle.net/11441/152684 | |
dc.description.abstract | A 0.9-V ΔΣ modulator integrated into a 0.18-μm CMOS technology for digitizing signals in low-power devices is presented in this paper. To do so, a cascade (multistage noise shaping) architecture based on an adder-less feedforward structure is proposed. The proposed modulator has a unity signal transfer function in both stages of the modulator in order to reduce the integrator's output swings. To mitigate the failure of slow process corner in the weak inversion as well as to further diminish the power consumption of the presented modulator, a fully differential self- and bulk-biased inverter-based operational transconductance amplifier is proposed. Experimental results are shown to demonstrate the efficiency of the proposed ΔΣ converter, showing state-of-the-art performance, by featuring 88.7-dB signal-to-noise ratio, 86.4-dB signal-to-noise plus distortion ratio, and 91-dB dynamic range within a signal bandwidth of 20 kHz, with a power dissipation of 103.4 μW when the circuit is clocked at 5.12 MHz. | es |
dc.format | application/pdf | es |
dc.format.extent | 13 p. | es |
dc.language.iso | eng | es |
dc.publisher | Institute of Electrical and Electronics Engineers | es |
dc.relation.ispartof | IEEE Transactions on Circuits and Systems I: Regular Papers, 65 (11), 8440665. | |
dc.subject | Analog-to-digital conversion | es |
dc.subject | delta-sigma modulation | es |
dc.subject | switched-capacitor circuits | es |
dc.subject | inverter-based OTAs | es |
dc.title | A 0.9-V 100-mu W Feedforward Adder-Less Inverter-Based MASH Delta Sigma Modulator With 91-dB Dynamic Range and 20-kHz Bandwidth | es |
dc.type | info:eu-repo/semantics/article | es |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.publisherversion | https://dx.doi.org/10.1109/TCSI.2018.2854220 | es |
dc.identifier.doi | 10.1109/TCSI.2018.2854220 | es |
dc.journaltitle | IEEE Transactions on Circuits and Systems I: Regular Papers | es |
dc.publication.volumen | 65 | es |
dc.publication.issue | 11 | es |
dc.publication.initialPage | 8440665 | es |
Ficheros | Tamaño | Formato | Ver | Descripción |
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Hona18V2.pdf | 10.25Mb | ![]() | Ver/ | Versión aceptada |
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