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A 10-MHz BW 77.3-dB SNDR 640-MS/s GRO-Based CT MASH Delta Sigma Modulator
dc.creator | Honarparvar, Mohammad | es |
dc.creator | Rosa Utrera, José Manuel de la | es |
dc.creator | Sawan, Mohammad | es |
dc.date.accessioned | 2023-12-19T09:54:43Z | |
dc.date.available | 2023-12-19T09:54:43Z | |
dc.date.issued | 2020 | |
dc.identifier.citation | Honarparvar, M., Rosa Utrera, J.M.d.l. y Sawan, M. (2020). A 10-MHz BW 77.3-dB SNDR 640-MS/s GRO-Based CT MASH Delta Sigma Modulator. IEEE Transactions on Circuits and Systems II: Express Briefs, 67 (9), 9104738. https://doi.org/10.1109/TCSII.2020.2998727. | |
dc.identifier.issn | 1549-7747 | es |
dc.identifier.issn | 1558-3791 | es |
dc.identifier.uri | https://hdl.handle.net/11441/152673 | |
dc.description.abstract | We present in this brief a novel multi-stage noiseshaping (MASH) 3-1 continuous-time (CT) delta-sigma modulator (M) with gated ring oscillator based quantizers (GROQs) in both stages of the cascade. The use of GROQs increases the linearity performance with respect to the conventional voltage controlled oscillator based quantizers (VCOQs) and allows a more robust extraction of the front-end stage quantization error in the time domain, thus making the proposed architecture more suitable to implement high-order expandable scaling-friendly MASH Ms, in which the back-end stages are implemented by mostly-digital GRO-based time-to-digital converters (TDCs). The circuit has been fabricated in a 65-nm CMOS technology with 1-V supply voltage, and it operates at 640-MHz sampling frequency to digitize 10-MHz signals. To the best of the authors’ knowledge, this is the first reported experimental validation of a GRO-based CT MASH M, featuring a 79.8-dB signal to noise ratio (SNR) at −2.2-dBFS, a 77.3-dB signal to (noise + distortion) ratio (SNDR) at −4-dBFS and a dynamic range (DR) of 81.7 dB, with a power consumption of 12-mW. These metrics demonstrate state-of-the-art performance with a DR-based Schreier FOM of 170.9 dB. | es |
dc.format | application/pdf | es |
dc.format.extent | 5 p. | es |
dc.language.iso | eng | es |
dc.publisher | Institute of Electrical and Electronics Engineers | es |
dc.relation.ispartof | IEEE Transactions on Circuits and Systems II: Express Briefs, 67 (9), 9104738. | |
dc.subject | Analog-to-digital converters | es |
dc.subject | modulators | es |
dc.subject | continuous-time circuits | es |
dc.subject | time/frequency-based quantization | es |
dc.title | A 10-MHz BW 77.3-dB SNDR 640-MS/s GRO-Based CT MASH Delta Sigma Modulator | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.publisherversion | https://dx.doi.org/10.1109/TCSII.2020.2998727 | es |
dc.identifier.doi | 10.1109/TCSII.2020.2998727 | es |
dc.journaltitle | IEEE Transactions on Circuits and Systems II: Express Briefs | es |
dc.publication.volumen | 67 | es |
dc.publication.issue | 9 | es |
dc.publication.initialPage | 9104738 | es |
Ficheros | Tamaño | Formato | Ver | Descripción |
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Hona20_postprint.pdf | 1.727Mb | ![]() | Ver/ | Versión aceptada |
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