Mostrar el registro sencillo del ítem

Artículo

dc.creatorHonarparvar, Mohammades
dc.creatorRosa Utrera, José Manuel de laes
dc.creatorSawan, Mohammades
dc.date.accessioned2023-12-19T09:54:43Z
dc.date.available2023-12-19T09:54:43Z
dc.date.issued2020
dc.identifier.citationHonarparvar, M., Rosa Utrera, J.M.d.l. y Sawan, M. (2020). A 10-MHz BW 77.3-dB SNDR 640-MS/s GRO-Based CT MASH Delta Sigma Modulator. IEEE Transactions on Circuits and Systems II: Express Briefs, 67 (9), 9104738. https://doi.org/10.1109/TCSII.2020.2998727.
dc.identifier.issn1549-7747es
dc.identifier.issn1558-3791es
dc.identifier.urihttps://hdl.handle.net/11441/152673
dc.description.abstractWe present in this brief a novel multi-stage noiseshaping (MASH) 3-1 continuous-time (CT) delta-sigma modulator (M) with gated ring oscillator based quantizers (GROQs) in both stages of the cascade. The use of GROQs increases the linearity performance with respect to the conventional voltage controlled oscillator based quantizers (VCOQs) and allows a more robust extraction of the front-end stage quantization error in the time domain, thus making the proposed architecture more suitable to implement high-order expandable scaling-friendly MASH Ms, in which the back-end stages are implemented by mostly-digital GRO-based time-to-digital converters (TDCs). The circuit has been fabricated in a 65-nm CMOS technology with 1-V supply voltage, and it operates at 640-MHz sampling frequency to digitize 10-MHz signals. To the best of the authors’ knowledge, this is the first reported experimental validation of a GRO-based CT MASH M, featuring a 79.8-dB signal to noise ratio (SNR) at −2.2-dBFS, a 77.3-dB signal to (noise + distortion) ratio (SNDR) at −4-dBFS and a dynamic range (DR) of 81.7 dB, with a power consumption of 12-mW. These metrics demonstrate state-of-the-art performance with a DR-based Schreier FOM of 170.9 dB.es
dc.formatapplication/pdfes
dc.format.extent5 p.es
dc.language.isoenges
dc.publisherInstitute of Electrical and Electronics Engineerses
dc.relation.ispartofIEEE Transactions on Circuits and Systems II: Express Briefs, 67 (9), 9104738.
dc.subjectAnalog-to-digital converterses
dc.subjectmodulatorses
dc.subjectcontinuous-time circuitses
dc.subjecttime/frequency-based quantizationes
dc.titleA 10-MHz BW 77.3-dB SNDR 640-MS/s GRO-Based CT MASH Delta Sigma Modulatores
dc.typeinfo:eu-repo/semantics/articlees
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/acceptedVersiones
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Electrónica y Electromagnetismoes
dc.relation.publisherversionhttps://dx.doi.org/10.1109/TCSII.2020.2998727es
dc.identifier.doi10.1109/TCSII.2020.2998727es
dc.journaltitleIEEE Transactions on Circuits and Systems II: Express Briefses
dc.publication.volumen67es
dc.publication.issue9es
dc.publication.initialPage9104738es

FicherosTamañoFormatoVerDescripción
Hona20_postprint.pdf1.727MbIcon   [PDF] Ver/Abrir   Versión aceptada

Este registro aparece en las siguientes colecciones

Mostrar el registro sencillo del ítem

Este documento está protegido por los derechos de propiedad intelectual e industrial. Sin perjuicio de las exenciones legales existentes, queda prohibida su reproducción, distribución, comunicación pública o transformación sin la autorización del titular de los derechos, a menos que se indique lo contrario.