Self-Testing Analog Spiking Neuron Circuit

El-Sayed, Sarah A.; Camuñas Mesa, Luis Alejandro; Linares Barranco, Bernabé; Stratigopoulos, Haralampos G.

doi:10.1109/SMACD.2019.8795234

Ponencia

dc.creator	El-Sayed, Sarah A.	es
dc.creator	Camuñas Mesa, Luis Alejandro	es
dc.creator	Linares Barranco, Bernabé	es
dc.creator	Stratigopoulos, Haralampos G.	es
dc.date.accessioned	2023-01-31T16:57:26Z
dc.date.available	2023-01-31T16:57:26Z
dc.date.issued	2019
dc.identifier.citation	El-Sayed, S.A., Camuñas Mesa, L.A., Linares Barranco, B. y Stratigopoulos, H.G. (2019). Self-Testing Analog Spiking Neuron Circuit. En 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) (81-84), Lausanne, Suiza: Institute of Electrical and Electronics Engineers.
dc.identifier.isbn	978-172811201-5	es
dc.identifier.uri	https://hdl.handle.net/11441/142243
dc.description.abstract	Hardware-implemented neural networks are foreseen to play an increasing role in numerous applications. In this paper, we address the problem of post-manufacturing test and self-test of hardware-implemented neural networks. In particular, we propose a self-testable version of a spiking neuron circuit. The self-test wrapper is a compact circuit composed of a low-precision ramp generator and a small digital block. The self-test principle is demonstrated on a spiking neuron circuit design in 0.35μm CMOS technology.	es
dc.format	application/pdf	es
dc.format.extent	4 p.	es
dc.language.iso	eng	es
dc.publisher	Institute of Electrical and Electronics Engineers	es
dc.relation.ispartof	2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) (2019), pp. 81-84.
dc.rights	Attribution-NonCommercial-NoDerivatives 4.0 Internacional	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/4.0/	*
dc.title	Self-Testing Analog Spiking Neuron Circuit	es
dc.type	info:eu-repo/semantics/conferenceObject	es
dcterms.identifier	https://ror.org/03yxnpp24
dc.type.version	info:eu-repo/semantics/acceptedVersion	es
dc.rights.accessRights	info:eu-repo/semantics/openAccess	es
dc.contributor.affiliation	Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo	es
dc.relation.publisherversion	https://doi.org/10.1109/SMACD.2019.8795234	es
dc.identifier.doi	10.1109/SMACD.2019.8795234	es
dc.publication.initialPage	81	es
dc.publication.endPage	84	es
dc.eventtitle	2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)	es
dc.eventinstitution	Lausanne, Suiza	es

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