dc.creator | Núñez Martínez, Juan | es |
dc.creator | Avedillo de Juan, María José | es |
dc.creator | Quintana Toledo, José María | es |
dc.date.accessioned | 2022-07-13T10:42:15Z | |
dc.date.available | 2022-07-13T10:42:15Z | |
dc.date.issued | 2011 | |
dc.identifier.citation | Núñez Martínez, J., Avedillo de Juan, M.J. y Quintana Toledo, J.M. (2011). Efficient realization of RTD-CMOS logic gates. En 21st Great lakes symposium on VLSI. | |
dc.identifier.isbn | 978-145030667-6 | es |
dc.identifier.uri | https://hdl.handle.net/11441/135304 | |
dc.description.abstract | The incorporation of Resonant Tunnel Diodes (RTDs) into III/V transistor technologies has shown an improved circuit performance: higher circuit speed, reduced component count, and/or lowered power consumption. Currently, the incorporation of these devices into CMOS technologies (RTD-CMOS) is an area of active research. Although some works have focused the evaluation of the advantages of this incorporation, additional work in this direction is required. This paper compares RTD-CMOS and pure CMOS realizations of a set of logic gates which can be operated in a gate-level nanopipelined. Lower average power and energy per cycle are obtained for RTD/CMOS implementations. | es |
dc.description.sponsorship | Spanish Ministry of Education and Science with support from ERDF under Project TEC2007- 67245 | es |
dc.description.sponsorship | Consejería de Innovación, Ciencia y Empresa, Junta de Andalucía under Project TIC-2961 | es |
dc.format | application/pdf | es |
dc.format.extent | 4 p. | es |
dc.language.iso | eng | es |
dc.relation.ispartof | 21st Great lakes symposium on VLSI (2011), pp. 387-390. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Resonant Tunneling Diode | es |
dc.subject | Emerging Technologies | es |
dc.subject | Logic Gates | es |
dc.subject | CMOS | es |
dc.title | Efficient realization of RTD-CMOS logic gates | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.projectID | TEC2007-67245 | es |
dc.relation.projectID | TIC-2961 | es |
dc.relation.publisherversion | https://dx.doi.org/10.1145/1973009.1973090 | es |
dc.identifier.doi | 10.1145/1973009.1973090 | es |
dc.publication.initialPage | 387 | es |
dc.publication.endPage | 390 | es |
dc.eventtitle | 21st Great lakes symposium on VLSI | es |
dc.contributor.funder | Ministerio de Educación y Ciencia (MEC). España | es |
dc.contributor.funder | European Commission (EC). Fondo Europeo de Desarrollo Regional (FEDER) | es |
dc.contributor.funder | Junta de Andalucía | es |