dc.creator | Avedillo de Juan, María José | es |
dc.creator | Jiménez, Manuel | es |
dc.creator | Núñez Martínez, Juan | es |
dc.date.accessioned | 2022-07-07T11:30:39Z | |
dc.date.available | 2022-07-07T11:30:39Z | |
dc.date.issued | 2018 | |
dc.identifier.citation | Avedillo de Juan, M.J., Jiménez, M. y Núñez Martínez, J. (2018). Phase Transition FETs for Improved Dynamic Logic Gates. IEEE Electron Device Letters, 39 (11), 8471107. | |
dc.identifier.issn | Print: 0741-3106 | es |
dc.identifier.issn | Electronic: 1558-0563 | es |
dc.identifier.uri | https://hdl.handle.net/11441/135121 | |
dc.description.abstract | Transistors incorporating phase change materials (Phase Change FETs) are being investigated to obtain steep switching and a boost in the I ON /I OFF ratio and, thus, to solve power and energy limitations of CMOS technologies. In addition to the replacement of the transistors in conventional static CMOS logic circuits, the distinguishing features of Phase Change FETs can be exploited in other application domains or can be useful for solving specific design challenges. In this letter, we take advantage of them to implement a smart dynamic gate in which undesirable contention currents are reduced, leading to speed advantage without power penalties. | es |
dc.description.sponsorship | Ministerio de Economía y Competitividad FEDER TEC2017-87052-P | es |
dc.format | application/pdf | es |
dc.format.extent | 4 p. | es |
dc.language.iso | eng | es |
dc.publisher | IEEE | es |
dc.relation.ispartof | IEEE Electron Device Letters, 39 (11), 8471107. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Steep subthreshold slope | es |
dc.subject | Phase transition materials | es |
dc.subject | Low voltage | es |
dc.subject | Dynamic logic | es |
dc.subject | Keeper transistor | es |
dc.title | Phase Transition FETs for Improved Dynamic Logic Gates | es |
dc.type | info:eu-repo/semantics/article | es |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.projectID | TEC2017-87052-P | es |
dc.relation.publisherversion | https://dx.doi.org/10.1109/LED.2018.2871855 | es |
dc.identifier.doi | 10.1109/LED.2018.2871855 | es |
dc.journaltitle | IEEE Electron Device Letters | es |
dc.publication.volumen | 39 | es |
dc.publication.issue | 11 | es |
dc.publication.initialPage | 8471107 | es |
dc.contributor.funder | Ministerio de Economía y Competitividad (MINECO). España | es |
dc.contributor.funder | European Commission (EC). Fondo Europeo de Desarrollo Regional (FEDER) | es |