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Mostrando ítems 21-30 de 56
Ponencia
Poisson AER generator: Inter-Spike-Intervals Analysis
(IEEE Computer Society, 2006)
Address-event-representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for bio-inspired processing systems (for example, image processing). Such systems ...
Ponencia
Neocortical frame-free vision sensing and processing through scalable Spiking ConvNet hardware
(IEEE Computer Society, 2010)
This paper summarizes how Convolutional Neural Networks (ConvNets) can be implemented in hardware using Spiking neural network Address-Event-Representation (AER) technology, for sophisticated pattern and object recognition ...
Ponencia
Voltage Mode Driver for Low Power Transmission of High Speed Serial AER Links
(IEEE Computer Society, 2011)
This paper presents a voltage-mode high speed driver to transmit serial AER data in scalable multi-chip AER systems. To take advantage of the asynchronous nature of AER (Address Event Representation) streams, this ...
Ponencia
A Current Attenuator for Efficient Memristive Crossbars Read-Out
(IEEE Computer Society, 2019)
This paper presents a new current attenuator circuit to scale down the inference currents in memristor based crossbars that drive integrate-and-fire neurons, which subsequently allows to reduce the size of integrating ...
Ponencia
Spiking Hough for Shape Recognition
(Springer, 2017)
The paper implements a spiking neural model methodology inspired on the Hough Transform. On-line event-driven spikes from Dynamic Vision Sensors are evaluated to characterize and recognize the shape of Poker signs. The ...
Ponencia
A General Subthreshold MOS Translinear Theorem
(IEEE Computer Society, 1999)
This paper outlines the conditions under which the translinear principle can be fully exploited for MOS transistors operating in subthreshold. Due to the exponential nature of subthreshold MOS transistors the translinear ...
Ponencia
Compact Calibration Circuit for Large Neuromorphic Arrays
(IEEE Computer Society, 2008)
Low current applications, like neuromorphic circuits, where operating currents can be as low as few nano amps or less, suffer from huge transistor mismatches, resulting in around or less than 1-bit precision. Here we ...
Ponencia
A Methodology for MOS Transistor Mismatch Parameter Extraction and Mismatch Simulation
(IEEE Computer Society, 2000)
This paper presents a methodology for mismatch parameter extraction and mismatch simulation using conventional electrical simulators, like HSpice. A measurement and extraction procedure has been carefully designed to be ...
Ponencia
On Synthetic AER Generation
(IEEE, 2004-05)
In this paper several software methods for generating synthetic AER streams from images stored in a computer's memory are proposed and evaluated. Evaluation criteria cover execution time, distribution error and how they ...
Ponencia
Advanced Vision Processing Systems: Spike-Based Simulation and Processing
(Springer, 2009)
In this paper we briefly summarize the fundamental properties of spike events processing applied to artificial vision systems. This sensing and processing technology is capable of very high speed throughput, because it ...