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Ponencia
LVDS interface for AER links with burst mode operation capability
(IEEE Computer Society, 2008)
This paper presents the design and simulation of a serial AER LVDS communication link. It converts data from classical AER parallel bus with a 4-phase handshaking protocol into a bit stream which is transmitted serially ...
Ponencia
High-Speed Character Recognition System based on a complex hierarchical AER architecture
(IEEE Computer Society, 2008)
In this paper we briefly summarize the fundamental properties of spikes processing applied to artificial vision systems. This sensing and processing technology is capable of very high speed throughput, because it does ...
Artículo
An Accurate Automatic Quality-Factor Tuning Scheme for Second-Order LC Filters
(IEEE Computer Society, 2007)
This paper presents a scheme to accurately tune the quality factor of second-order LC bandpass filters. The information of the magnitude response at the center and one of the cutoff frequencies is used to tune both the ...
Ponencia
High-speed image processing with AER-based components
(IEEE Computer Society, 2006)
A high speed sample image processing application using AER-based components is presented. The setup objective is to distinguish between two propellers of different shape rotating at high speed (around 1000 revolutions/sec) ...
Ponencia
Spike Events Processing for Vision Systems
(IEEE Computer Society, 2007)
In this paper we briefly summarize the fundamental properties of spike events processing applied to artificial vision systems. This sensing and processing technology is capable of very high speed throughput, because ...
Ponencia
A Physical Interpretation of the Distance Term in Pelgrom’s Mismatch Model results in very Efficient CAD
(IEEE Computer Society, 2007)
In 1989 Pelgrom et al. published a mismatch model for MOS transistors, where the standard quadratic deviation of the mismatch in a parameter between two identical transistors, is given by two independent terms: (1) a ...
Ponencia
Programmable kernel analog VLSI convolution chip for real time vision processing
(IEEE Computer Society, 2000)
A neural architecture that implements a programmable 2D image filter has been presented. The architecture allows to implement any 2D filter F(p,q) decomposable into x-axis and y-axis components F(p,q) = H(p)V(q) such that ...
Artículo
On Real-Time AER 2-D Convolutions Hardware for Neuromorphic Spike-Based Cortical Processing
(IEEE Computer Society, 2008)
In this paper, a chip that performs real-time image convolutions with programmable kernels of arbitrary shape is presented. The chip is a first experimental prototype of reduced size to validate the implemented circuits ...
Ponencia
OTA-C oscillator with low frequency variations for on-chip clock generation in serial LVDS-AER links
(IEEE Computer Society, 2009)
This paper presents the design and simulation of an OTA-C oscillator intended to be used as on-chip frequency reference. This reference will be part of the high speed clock generation circuit for Manchester serial LVDS-AER ...
Ponencia
Compact Calibration Circuit for Large Neuromorphic Arrays
(IEEE Computer Society, 2008)
Low current applications, like neuromorphic circuits, where operating currents can be as low as few nano amps or less, suffer from huge transistor mismatches, resulting in around or less than 1-bit precision. Here we ...