Ponencia
OTA-C oscillator with low frequency variations for on-chip clock generation in serial LVDS-AER links
Autor/es | Zamarreño Ramos, Carlos
Serrano Gotarredona, María Teresa Linares Barranco, Bernabé |
Departamento | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores |
Fecha de publicación | 2009 |
Fecha de depósito | 2020-10-29 |
Publicado en |
|
ISBN/ISSN | 978-1-4244-3827-3 0271-4302 |
Resumen | This paper presents the design and simulation of an OTA-C oscillator intended to be used as on-chip frequency reference. This reference will be part of the high speed clock generation circuit for Manchester serial LVDS-AER ... This paper presents the design and simulation of an OTA-C oscillator intended to be used as on-chip frequency reference. This reference will be part of the high speed clock generation circuit for Manchester serial LVDS-AER links. A Manchester LVDS receiver can adapt its operation in a limited range of frequencies, so the most important specification is the frequency stability over temperature and process variations. A novel design methodology is presented to design two oscillators in a 90 nm technology using transistors with 2.5 V supply voltage. Intensive simulations with temperature, process, supply voltage variations and mismatch effects were performed in order to analyze the validity of this approach, obtaining Delta ap 7%. |
Agencias financiadoras | European Union (UE) Ministerio de Educación y Ciencia (MEC). España Junta de Andalucía |
Identificador del proyecto | 216777 (NABAB)
TEC2006-11730-C03-01 P06-TIC-01417 |
Cita | Zamarreño Ramos, C., Serrano Gotarredona, M.T. y Linares Barranco, B. (2009). OTA-C oscillator with low frequency variations for on-chip clock generation in serial LVDS-AER links. En ISCAS 2009: IEEE International Symposium on Circuits and Systems (2657-2660), Taipei, Taiwan: IEEE Computer Society. |
Ficheros | Tamaño | Formato | Ver | Descripción |
---|---|---|---|---|
OTA-C Oscillator.pdf | 1.152Mb | [PDF] | Ver/ | |