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Low Latency Event-Based Filtering and Feature Extraction for Dynamic Vision Sensors in Real-Time FPGA Applications [Article]
(IEEE Computer Society, 2019)
Dynamic Vision Sensor (DVS) pixels produce an asynchronous variable-rate address-event output that represents brightness changes at the pixel. Since these sensors produce frame-free output, they are ideal for real-time ...
Embedding Multi-Task Address-Event- Representation Computation [Chapter of Book]
(Springer, 2009)
Address-Event-Representation, AER, is a communication protocol that is intended to transfer neuronal spikes between bioinspired chips. There are several AER tools to help to develop and test AER based systems, which ...
On the AER Stereo-Vision Processing: A Spike Approach to Epipolar Matching [Presentation]
(Springer, 2013)
Image processing in digital computer systems usually considers visual information as a sequence of frames. These frames are from cameras that capture reality for a short period of time. They are renewed and transmitted ...
Musical notes classification with Neuromorphic Auditory System using FPGA and a Convolutional Spiking Network [Presentation]
(IEEE Computer Society, 2015)
In this paper, we explore the capabilities of a sound classification system that combines both a novel FPGA cochlear model implementation and a bio-inspired technique based on a trained convolutional spiking network. ...
An AER Spike-Processing Filter Simulator and Automatic VHDL Generator Based on Cellular Automata [Presentation]
(Springer, 2011)
Spike-based systems are neuro-inspired circuits implementations traditionally used for sensory systems or sensor signal processing. Address-Event- Representation (AER) is a neuromorphic communication protocol for ...
An Approach to Distance Estimation with Stereo Vision Using Address-Event-Representation [Presentation]
(Springer, 2011)
Image processing in digital computer systems usually considers the visual information as a sequence of frames. These frames are from cameras that capture reality for a short period of time. They are renewed and transmitted ...
NAVIS: Neuromorphic Auditory VISualizer Tool [Article]
(Elsevier, 2017)
This software presents diverse utilities to perform the first post-processing layer taking the neuromorphic auditory sensors (NAS) information. The used NAS implements in FPGA a cascade filters architecture, imitating the ...
Live Demonstration: neuromorphic robotics, from audio to locomotion through spiking CPG on SpiNNaker. [Presentation]
(IEEE Computer Society, 2019)
This live demonstration presents an audio-guided neuromorphic robot: from a Neuromorphic Auditory Sensor (NAS) to locomotion using Spiking Central Pattern Generators (sCPGs). Several gaits are generated by sCPGs ...
Live Demonstration: Neuromorphic Row-by-Row Multi-convolution FPGA Processor-SpiNNaker architecture for Dynamic-Vision Feature Extraction [Presentation]
(IEEE Computer Society, 2019)
In this demonstration a spiking neural network architecture for vision recognition using an FPGA spiking convolution processor, based on leaky integrate and fire neurons (LIF) and a SpiNNaker board is presented. The ...
Spikes Monitors for FPGAs, an Experimental Comparative Study [Presentation]
(Springer, 2013)
In this paper we present and analyze two VHDL components for monitoring internal activity of spikes fired by silicon neurons inside FPGAs. These spikes monitors encode each spike according to the Address-Event ...