An AER Spike-Processing Filter Simulator and Automatic VHDL Generator Based on Cellular Automata
|Author/s||Rivas Pérez, Manuel
Linares Barranco, Alejandro
Gómez Rodríguez, Francisco de Asís
Morgado Estévez, Arturo
Civit Balcells, Antón
Jiménez Moreno, Gabriel
|Department||Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores|
|Abstract||Spike-based systems are neuro-inspired circuits implementations
traditionally used for sensory systems or sensor signal processing. Address-Event-
Representation (AER) is a neuromorphic communication protocol for ...
Spike-based systems are neuro-inspired circuits implementations traditionally used for sensory systems or sensor signal processing. Address-Event- Representation (AER) is a neuromorphic communication protocol for transferring asynchronous events between VLSI spike-based chips. These neuro-inspired implementations allow developing complex, multilayer, multichip neuromorphic systems and have been used to design sensor chips, such as retinas and cochlea, processing chips, e.g. filters, and learning chips. Furthermore, Cellular Automata (CA) is a bio-inspired processing model for problem solving. This approach divides the processing synchronous cells which change their states at the same time in order to get the solution. This paper presents a software simulator able to gather several spike-based elements into the same workspace in order to test a CA architecture based on AER before a hardware implementation. Furthermore this simulator produces VHDL for testing the AER-CA into the FPGA of the USBAER AER-tool.
|Citation||Rivas Pérez, M., Linares Barranco, A., Gómez Rodríguez, F.d.A., Morgado, A., Civit Balcells, A. y Jiménez Moreno, G. (2011). An AER Spike-Processing Filter Simulator and Automatic VHDL Generator Based on Cellular Automata. En IWANN 2011: 11th International Work-Conference on Artificial Neural Networks (157-165), Torremolinos, Málaga: Springer.|