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Mostrando ítems 11-20 de 58
Ponencia
Harmonic Distortion in Fully-Differential Switched-Current Sigma-Delta Modulators
(1999)
This paper presents a systematic analysis of the harmonic distortion in SD modulators (SDMs) implemented with fully-differential switched-current (SI) circuits. Closed form expressions are derived for the third-order ...
Ponencia
Expandible high-order cascade ya modulator with constant, reduced systematic loss of resolution
(Institute of Electrical and Electronics Engineers, 2003)
An arbitrary order sigma-delta modulator cascude architecture is presented with only I-bit loss of resolution due to scaling issues, even with single-bit quantizulion. This loss is kept with a high overloading point, ...
Ponencia
Design of a power-efficient widely-programmable Gm-LC band-pass sigma-delta modulator for SDR
(Institute of Electrical and Electronics Engineers, 2016)
This paper presents the design and implementation of a fourth-order band-pass continuous-time modulator intended for the digitization of radio-frequency signals in softwaredefined- radio applications. The modulator ...
Ponencia
A 0.13μm CMOS current steering D/A converter for PLC and VDSL applications
(2005)
This paper describes the design of a 12-bit 80MS/s Digital-to-Analog converter implemented in a 0.13μm CMOS logic technology. The design has been computer-aided by a developed toolbox for the simulation and verification ...
Ponencia
A SIMULINK-based approach for fast and precise simulation of switched-capacitor, switched-current and continuous-time /spl Sigma//spl Delta/ modulators
(Institute of Electrical and Electronics Engineers, 2003)
This paper describes how to extend the capabilities of SIMULINK for the time-domain simulation of /spl Sigma//spl Delta/ modulators implemented by using switched-capacitor, switched-current and continuous-time circuits, ...
Artículo
Resonation-based hybrid continuous-time/discrete-time cascade ΣΔ modulators: application to 4G wireless telecom
(Society of Photo-Optical Instrumentation Engineers, 2009)
This paper presents innovative architectures of hybrid Continuous-Time/Discrete-Time (CT/DT) cascade ΣΔ Modulators (ΣΔMs) made up of a front-end CT stage and a back-end DT stage. In addition to increasing the digitized ...
Artículo
Characterization-Based Modeling of Retriggering and Afterpulsing for Passively Quenched CMOS SPADs
(Institute of Electrical and Electronics Engineers, 2019)
The current trend in the design of systems based on CMOS SPADs is to adopt smaller technological nodes, allowing the co-integration of additional electronics for the implementation of complex digital systems on chip. Due ...
Artículo
High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models
(Institute of Electrical and Electronics Engineers, 2005)
This paper presents a high-level synthesis tool for ΣΔ Modulators (ΣΔMs) that combines an accurate SIMULINK-based time-domain behavioral simulator with a statistical optimization core. Three different circuit techniques ...
Ponencia
A 14-bit 4-MS/s Multi-bit Cascade Sigma-Delta Modulator in CMOS 0.35-um Digital Technology
(2000)
This paper presents a 4th-order 3-stage cascade SD modulator that achieves 14-bit dynamic range at 4MS/s using low oversampling ratio. It includes a programmable multi-bit quantizer in the last stage, providing 2-, 3-, ...
Ponencia
Reconfiguration of Cascade ΣΔ Modulators for Multistandard GSM/Bluetooth/UIMTS/WLAN Transceivers
(Institute of Electrical and Electronics Engineers, 2006)
This paper presents design considerations for cascade Sigma-Delta Modulators (ΣΔMs) included in multi-standard wireless transceivers. Four different standards are covered: GSM, Bluetooth, UMTS and WLAN. A top-down design ...