Now showing items 1-6 of 6
1 V CMOS subthreshold log domain PDM [Article]
A new CMOS circuit strategy for very low-voltage Pulse-Duration Modulators (PDM) is proposed. Optimization of voltage supply scaling below the sum of threshold voltages is based on Instantaneous Log Companding processing ...
An Experimentally-Validated Verilog-A SPAD Model Extracted from TCAD Simulation [Presentation]
(Institute of Electrical and Electronics Engineers, 2018)
Single-photon avalanche diodes (SPAD) are photodetectors with exceptional characteristics. This paper proposes a new approach to model them in Verilog-A HDL with the help of a powerful tool: TCAD simulation. Besides, to ...
Characterization of electrical crosstalk in 4T-APS arrays using TCAD simulations [Presentation]
(Institute of Electrical and Electronics Engineers, 2017)
TCAD simulations have been conducted on a CMOS image sensor in order to characterize the electrical component of the crosstalk between pixels through the study of the electric field distribution. The image sensor consists ...
Characterization-Based Modeling of Retriggering and Afterpulsing for Passively Quenched CMOS SPADs [Article]
(Institute of Electrical and Electronics Engineers, 2019)
The current trend in the design of systems based on CMOS SPADs is to adopt smaller technological nodes, allowing the co-integration of additional electronics for the implementation of complex digital systems on chip. Due ...
Multirate cascaded discrete-time low-pass ΔΣ modulator for GSM/Bluetooth/UMTS [Article]
(Institute of Electrical and Electronics Engineers, 2010)
This paper shows that multirate processing in a cascaded discrete-time ΔΣ modulator allows to reduce the power consumption by up to 35%. Multirate processing is possible in a discrete-time ΔΣ modulator by its adaptibility ...
Low-voltage CMOS log-companding techniques for audio applications [Article]
This paper presents a collection of novel current-mode circuit techniques for the integration of very low-voltage (down to 1 V) low-power (few hundreds of μA) complete SoCs in CMOS technologies. The new design proposal is ...