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Mostrando ítems 41-50 de 56
Ponencia
A 76nW, 4kS/s 10-bit SAR ADC with offset cancellation for biomedical applications
(Institute of Electrical and Electronics Engineers, 2016)
This paper presents a 10-bit fully-differential rail-to-rail successive approximation (SAR) ADC designed for biomedical applications. The ADC, fabricated in a 180nm HV CMOS technology, features low switching energy consumption ...
Ponencia
CMOS current-mode chaotic neurons
(Institute of Electrical and Electronics Engineers, 1994)
This paper presents two nonlinear CMOS current-mode circuits that implement neuron soma equations for chaotic neural networks, and another circuit to realize programmable current-mode synapse using CMOS-compatible BJT's. ...
Ponencia
A 64-channel inductively-powered neural recording sensor array
(Institute of Electrical and Electronics Engineers, 2012)
This paper reports a 64-channel inductively powered neural recording sensor array. Neural signals are acquired, filtered, digitized and compressed in the channels. Additionally, each channel implements a local auto-calibration ...
Artículo
An ultralow-power mixed-signal back end for passive sensor UHF RFID transponders
(Institute of Electrical and Electronics Engineers, 2012)
This paper describes the design of mixed-signal back end for an ultrahigh-frequency sensor-enabled radio-frequency identification transponder in full compliance with the Electronic Product Code Class-1 Generation-2 protocol, ...
Artículo
Enhanced Sensitivity of CMOS Image Sensors by Stacked Diodes
(Institute of Electrical and Electronics Engineers, 2016)
We have investigated and compared the performance of photodiodes built with stacked p/n junctions operating in parallel versus conventional ones made with single p/n junctions. We propose a method to characterize and compare ...
Ponencia
Simulation-based high-level synthesis of Nyquist-rate data converters using MATLAB/SIMULINK
(The International Society for Optical Engineering - SPIE, 2005)
This paper presents a toolbox for the simulation, optimization and high-level synthesis of Nyquist-rate Analog-to-Digital (A/D) and Digital-to-Analog (D/A) Converters in MATLAB®. The embedded simulator uses SIMULINK® C-coded ...
Ponencia
An Embedded 12-bit 80MS/s A/D/A Interface for Power-Line Communications in 0.13μm Pure Digital CMOS Technology
(Institute of Electrical and Electronics Engineers, 2005)
This paper presents an embedded interface, comprising both A/D and D/A converters, which has been implemented in a 0.13μm pure digital CMOS technology. The interface is integrated in a system for high-performance broad-band ...
Ponencia
In vivo measurements with a 64-channel extracellular neural recording integrated circuit
(Institute of Electrical and Electronics Engineers, 2014)
This paper presents in vivo measurements obtained from an implantable 64-channel neural recording Application Specific Integrated Circuit (ASIC) developed at IMSE and gives details of the computer interface used for real-time ...
Ponencia
A 2.2 μW analog front-end for multichannel neural recording
(Institute of Electrical and Electronics Engineers, 2017)
In this paper an analog front-end for the multi-channel implantable recording of neural signals is presented. It is comprised by a two-stage AC-coupled low-noise amplifier (LNA) and a one stage AC-coupled variable gain ...
Artículo
CMOS 2.4μm chaotic oscillator: Experimental verification of chaotic encryption of audio
(Institution of Engineering and Technology, 1996)
The Letter reports the first experimental verification of chaotic encryption of audio using custom monolithic chaotic oscillators. We use Gm-C techniques to realise a chaotic modulator/ demodulator IC that implements a ...