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Mostrando ítems 51-55 de 55
Artículo
A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators
(Institute of Electrical and Electronics Engineers, 2006)
This brief presents an efficient method for synthesizing cascaded sigma–delta modulators implemented with continuous-time circuits. It is based on the direct synthesis of the whole cascaded architecture in the continuous-time ...
Artículo
A CMOS 0.8 μm fully differential current mode buffer for HF SI circuits
(Elsevier, 1998)
We present a high-frequency fully-differential current-mode buffer to interface off-chip currents with no significant degradation of the frequency response, and to measure current-mode ICs using standard equipment. It has ...
Artículo
A design tool for high-resolution high-frequency cascade continuous- time Σ∆ modulators
(SPIE, 2007)
This paper introduces a CAD methodology to assist the de signer in the implementation of continuous-time (CT) cas- cade Σ∆ modulators. The salient features of this methodology ar e: (a) flexible behavioral modeling ...
Artículo
Fourth-order cascade SC ΣΔ modulators: a comparative study
(Institute of Electrical and Electronics Engineers, 1998)
Fourth-order cascade ΣΔ modulators are very well suited for IC implementation using analog sampled-data circuits because of their robust, stable operation and their capability to achieve high resolution and wide bandwidth ...
Artículo
Analysis of error mechanisms in switched-current Sigma-Delta modulators
(Springer, 2004)
This paper presents a systematic analysis of the major switched-current (SI) errors and their influence on the performance degradation of ΣΔ Modulators (ΣΔMs). The study is presented in a hierarchical systematic way. First, ...