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Mostrando ítems 21-30 de 55
Ponencia
A 2.5-V ΣΔ modulator in 0.25-um CMOS for ADSL
(Institute of Electrical and Electronics Engineers, 2002)
This paper presents a dual-quantization SC Sigma-Delta Modulator intended for A/D Conversion in ADSL applications.
Ponencia
Effect of Clock Jitter Error on the Performance Degradation of Multi-bit Continuous-Time ΣΔ Modulators With NRZ DAC
(2005)
This paper analyses the effect of the clock jitter error in multi-bit continuous-time ΣΔ modulators with non-return-to-zero feedback waveform. Derived expressions show that the jitter-induced noise power can be separated ...
Ponencia
MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time Sigma-Delta Modulators
(Institute of Electrical and Electronics Engineers, 2004)
This paper describes a tool that combines an accurate SIMULINK-based time-domain behavioural simulator with a statistical optimizer for the automated high-level synthesis of ΣΔ Modulators (ΣΔMs). The combination of high ...
Ponencia
Analysis and Experimental Characterization of Idle Tones in 2nd-Order Bandpass Sigma-Delta Modulators - A 0.8μm CMOS Switched-Current Case Study
(Institute of Electrical and Electronics Engineers, 2001)
Ths paper analyses the tonal behaviour of the quantization noise in 2nd-order bandpass SD modulators. The analysis previously performed for lowpass modulators is extended to the bandpass case. As a result, closed-form ...
Artículo
A CMOS 0.8- µm transistor-only 1.63-MHz switched-current bandpass ΣΔ modulator for AM signal A/D conversion
(Institute of Electrical and Electronics Engineers, 2000)
This paper presents a CMOS 0.8-/spl mu/m switched-current (SI) fourth-order bandpass /spl Sigma//spl Delta/ modulator (BP-/spl Sigma//spl Delta/M) IC capable of handling signals up to 1.63 MHz with 105-bit resolution and ...
Ponencia
Effect of Non-Linear Settling Error on The Harmonic Distortion of Fully-Differential Switched-Current BandPass Sigma-Delta Modulators
(Institute of Electrical and Electronics Engineers, 2001)
This paper presents a detailed study of the effect of the non-linear settling on the harmonic distortion of BandPass SD Modulators (BP-ΣΔMs) realized using Fully Differential (FD) SwItched-current (SI) circuits. Based on ...
Ponencia
A 0.35μm CMOS 17-bit@40kS/s Sensor A/D Interface Based on a Programmable-Gain Cascade 2-1 ΣΔ Modulator
(Institute of Electrical and Electronics Engineers, 2004)
This paper describes the design and electrical implementation of an A/D interface for sensor applications realized in a 0.35μm standard CMOS technology. The circuit is composed of a low-noise instrumentation preamplifier ...
Ponencia
A ΣΔ modulator for a programmable-gain, low-power, high-linearity automotive sensor interface
(The International Society for Optical Engineering - SPIE, 2003)
This paper describes the design and electrical implementation of a 0.35μm CMOS 17-bit≰0kS/s Sigma-Delta Modulator (ΣΔM) forming part of a sensor interface for automotive applications. First of all, the paper discusses the ...
Ponencia
An Optimization-based Tool for the High-Level Synthesis of Discrete-time and continuous-Time Sigma-Delta Modulators in the MATLAB/SIMULINK Environment
(Institute of Electrical and Electronics Engineers, 2004)
This paper presents a MATLAB toolbox for the automated high-level sizing of ΣΔ Modulators (ΣΔMs) based on the combination of an accurate time-domain behavioural simulator and a statistical optimizer. The implementation on ...
Ponencia
Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta Modulators
(2001)
This paper presents a precise model for the transient behaviour of Fully Differential (FD) SwItched-current (SI) memory cells placed at the front-end of high-speed A/D interfaces. This model allows us to analyze the main ...