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Mostrando ítems 31-40 de 175
Ponencia
Neuron fault tolerance in spiking neural networks
(Institute of Electrical and Electronics Engineers. IEEE, 2021)
The error-resiliency of Artificial Intelligence (AI) hardware accelerators is a major concern, especially when they are deployed in mission-critical and safety-critical applications. In this paper, we propose a neuron ...
Ponencia
Programmable kernel analog VLSI convolution chip for real time vision processing
(IEEE Computer Society, 2000)
A neural architecture that implements a programmable 2D image filter has been presented. The architecture allows to implement any 2D filter F(p,q) decomposable into x-axis and y-axis components F(p,q) = H(p)V(q) such that ...
Artículo
Compact low-power calibration mini-DACs for neural arrays with programmable weights
(Institute of Electrical and Electronics Engineers, 2003)
This paper considers the viability of compact low-resolution low-power mini digital-to-analog converters (mini-DACs) for use in large arrays of neural type cells, where programmable weights are required. Transistors are ...
Ponencia
Scene Context Classification with Event-Driven Spiking Deep Neural Networks
(IEEE Computer Society, 2018)
Event-Driven computation is attracting growing attention among researchers for several reasons. On one hand, the availability of new bio-inspired retina-like vision sensors that provide spiking outputs, like the Dynamic ...
Ponencia
Hysteresis based neural oscillators for VLSI implementations
(Institute of Electrical and Electronics Engineers, 1991)
The actual tendency in most of the work that is being done in VLSI neural network research is to use the simplest possible models to perform the desired tasks. This yields to the use of sigmoidal type neurons that have ...
Ponencia
Improved Contrast Sensitivity DVS and its Application to Event-Driven Stereo Vision
(IEEE Computer Society, 2013)
This paper presents a new DVS sensor with one order of magnitude improved contrast sensitivity over previous reported DVSs. This sensor has been applied to a bio-inspired event-based binocular system that performs 3D ...
Artículo
A spatial contrast retina with on-chip calibration for neuromorphic spike-based AER vision systems
(Institute of Electrical and Electronics Engineers, 2007)
We present a 32 32 pixels contrast retina microchip that provides its output as an address event representation (AER) stream. Spatial contrast is computed as the ratio between pixel photocurrent and a local average between ...
Artículo
Fast Predictive Handshaking in Synchronous FPGAs for Fully Asynchronous Multisymbol Chip Links: Application to SpiNNaker 2-of-7 Links
(Institute of Electrical and Electronics Engineers, 2016)
Asynchronous handshaken interchip links are very popular among neuromorphic full-custom chips due to their delay-insensitive and high-speed properties. Of special interest are those links that minimize bit-line transitions ...
Artículo
A neuromorphic cortical-layer microchip for spike-based event processing vision systems
(Institute of Electrical and Electronics Engineers, 2006)
We present a neuromorphic cortical-layer processing microchip for address event representation (AER) spike-based processing systems. The microchip computes 2-D convolutions of video information represented in AER format ...
Artículo
On Real-Time AER 2-D Convolutions Hardware for Neuromorphic Spike-Based Cortical Processing
(IEEE Computer Society, 2008)
In this paper, a chip that performs real-time image convolutions with programmable kernels of arbitrary shape is presented. The chip is a first experimental prototype of reduced size to validate the implemented circuits ...